Emulating CPU activity per cycle

Discuss emulation of the Nintendo Entertainment System and Famicom.

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SusiKette
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Emulating CPU activity per cycle

Post by SusiKette » Thu Dec 27, 2018 3:30 am

I heard there are some documents that describe what the 6502 CPU is doing every cycle of each operation. Where can I find one? Also, is is possible to emulate the CPU in such way that you don't have to implement illegal opcodes separately and have them be a side effect of the coding, just like they are a side effect of the CPU's wiring/design. There seems to be some patterns in what bits have to be set to get certain opcode and addressing mode, but they seem to be most consistent with ALU operations and there are a lot of exceptions as well.

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koitsu
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Re: Emulating CPU activity per cycle

Post by koitsu » Thu Dec 27, 2018 3:40 am

https://github.com/eteran/pretendo/blob ... 2.txt#L820

"How" you implement your CPU core is up to you. There's truly nothing wrong with "a big case statement" for each opcode, but if you want to try and organise things by ALU or whatever else and invent some other model, go for it. CPU emulation is really not going to be your bottleneck, at least with regards to the above choices for opcode emulation; don't worry about it.

Edit: here's a chart organised by addressing mode/functionality... sort of. I don't find this intuitive at all, but YMMV: https://www.masswerk.at/6502/6502_instr ... tml#layout

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SusiKette
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Re: Emulating CPU activity per cycle

Post by SusiKette » Mon Jan 07, 2019 1:00 am

A chart like that is useful, but according to a decode ROM from Atari (which was noted to be different from 6502's decode ROM) there are also cases in instruction decoding where certain bits are ignored rather than having to be 1 or 0. This as far as know wasn't illustrated in the chart. It might be possible to figure out most of the decode ROM from what is known about the instructions and their similarities and the "patterns" in the opcode table

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koitsu
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Re: Emulating CPU activity per cycle

Post by koitsu » Sat Feb 16, 2019 12:02 am

Sorry to dig up this nearing-2-month-old thread, but while helping on something unrelated, I came across something that I think is relevant to what you're wanting -- maybe. It's for the 65816, but the model certainly applies to the 6502 too for lots of reasons. I was reminded of it tonight after being linked some MAME source code to a Konami-specific 6809. "Oh, right, I should follow up to that thread SusiKette had..."

Please check out the Programming the 65816 book, specifically Appendix D, "Instruction Groups", pages 567-561. Again, this is for 65816, but it might give you some ideas of how to go about it, and/or even the overall code/style of the 6809 CPU emulation I linked in MAME.

ace314159
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Re: Emulating CPU activity per cycle

Post by ace314159 » Sat Feb 16, 2019 10:59 pm

There's also a 6502 manual that goes over what occurs during each clock cycle of the addressing mode. That information is under Appendix E, but I think reading the other parts wouldn't be a waste since it explains the CPU pretty well.

This document also goes over what occurs during each clock cycle and includes what occurs during the actual operation itself as well as the addressing mode.

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