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PostPosted: Tue Jan 08, 2019 12:53 pm 
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Zepper wrote:
So, what's the correct setting for DMC powerup/reset?
The registers at $4010, $4012, and $4013 have the same geometry as the registers from $4000-$400F, so it appears that they should come out of cold boot holding 0.

The register at $4011 is a different shape, but previous evidence (krzysiobal's switchable 60Hz/50Hz famiclone) implies that it also comes out of cold boot holding 0.


On warm boot, $4010, $4012, $4013 are unchanged. The upper six bits of $4011 are cleared and the least significant bit is known to not be changed. (i.e. &= 1)


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PostPosted: Tue Jan 08, 2019 1:45 pm 
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Sour wrote:
Based on Eugene's results, the sample address should be initialized to $C000 and length to 1 byte, which should cause a buzzing on the C000 test.

Since he tested on Everdrive, like me, I'm not sure we can trust those results. I'll do additional testing on this tonight. The test for this should be setting the register with one ROM, resetting to the menu while maintaining power, and testing the value with another ROM to see if it persists (though this isn't a perfect test because the Everdrive could modify registers on reset that aren't touched on power-on).

Unless PowerPak is any different, testing this properly may require a dev cart.


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PostPosted: Tue Jan 08, 2019 2:05 pm 
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Ah, hadn't looked at the video so I had assumed it was tested on a regular cart.

Like you said, without a regular cart, there is no 100% safe way to test this - any write to $4012/4013 will make the test unreliable, and there is no way to know for sure that the PowerPak/Everdrive do not write to those registers. So the only thing that can be tested is reset behavior (which is arguably less important than the power on behavior)


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PostPosted: Tue Jan 08, 2019 5:30 pm 
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Here's what should be a set of pretty thorough tests.

DmcPowerOnSilent sets virtually everything other than $C000 to $87 ($C000 is $00). If this test is silent on hardware, this should prove that the power on address & length are $C000 and $01 respectively.

DmcPowerOnBuzz keeps every byte at $00 (except the bare minimum for the code/data) and sets $C000 to $87. This should buzz on hardware at power on. Pressing a button should stop the sound (by setting the sample address to $FFC0). Pressing a button and then resetting should NOT cause a buzz (if the sample address is unchanged by a soft reset). Resetting without pressing a button should keep the buzz going.


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PostPosted: Wed Jan 09, 2019 6:29 am 
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Tried out your test on Everdrive. DmcPowerOnBuzz starts up with buzzing, pressing a button silences the buzzing, and it remains silent after a reset, so seems to confirm that address is preserved across resets.

I did further testing with my sample-based test and it plays the full sample normally after reset, so it appears length and flags/rate are also preserved. I've also verified that the Everdrive menu (at least through reset) modifies these registers, by first playing a sample in one ROM, resetting to the menu, and starting another ROM containing those same samples that just writes to $4015 without setting any DMC registers (the sample is not played).


@lidnariq: Maybe drifting off-topic a tiny bit, but I was looking at the wiki page on DMC and saw this note on writing to $4011: "If the timer is outputting a clock at the same time, the output level is occasionally not changed properly.[1]". The referenced post by rainwarrior notes the issue, but he isn't sure how this works just from testing. Is this something you can take a stab at from Visual2A03?


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PostPosted: Wed Jan 09, 2019 2:47 pm 
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That's "just" a bus conflict.

The DPCM DACs have the exact same "basic cell" as I saw in the 2C02's up-counters for $2006 and $2003... only this has a little extra support circuitry to allow it count up or down.

If "pcm_doadjust" is true at the same time that "w4011" is true, even though _db1 through _db6 are larger and would usually win, there's nothing to stop pcm_doadjust from pulling the storage node down.

"w4011" is true during φ2 (actually φ2, not M2), but I'm having the worst time tracking down the exact timing of pcm_doadjust.


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File comment: edit: had invert/hold node names backwards
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