Looking for clarification on bg shifts and output pixels

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wbrian
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Joined: Wed Feb 15, 2017 6:41 pm

Looking for clarification on bg shifts and output pixels

Post by wbrian » Mon Jan 21, 2019 8:34 pm

I'm looking at the PPU rendering docs and am looking for some clarification. The first point of clarification is during which cycles the background shift registers shift:
Every cycle, a bit is fetched from the 4 background shift registers in order to create a pixel on screen.
https://wiki.nesdev.com/w/index.php/PPU ... ng#Preface
Sprite zero hits act as if the image starts at cycle 2 (which is the same cycle that the shifters shift for the first time), so the sprite zero flag will be raised at this point at the earliest. Actual pixel output is delayed further due to internal render pipelining, and the first pixel is output during cycle 4.
https://wiki.nesdev.com/w/index.php/PPU ... cles_1-256

Basically, I'm looking for a definitive answer as to when the shift registers actually shift. Is it:
  • During every cycle?
  • During every cycle excluding the cycle 0 and 1 (Just the first scanline? Every scanline? All visible scanlines?)
I looked at the source for Mesen for clarification and it appears that it shifts them when scanline >= 0 && cycle <=256.

https://github.com/SourMesen/Mesen/blob ... U.cpp#L902

If there is a distinction being made between "what the PPU technically does" versus "what needs to be done purely from a practical point of view" then for the sake of this question, I'm interested in the former.

The other point of clarification is also part of the second quote, specifically "the first pixel is output during cycle 4." Does this mean that for each visible scanline, I'm reading pixel values and writing to the screen buffer starting at cycle four? Again, looking at other emulators, I don't see them doing this, so I'm trying to reconcile the technical details with how I'm seeing them implemented elsewhere.

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