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 Post subject: JMP and JSR micro OPs
PostPosted: Tue Jan 29, 2019 1:22 am 
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Joined: Fri Mar 16, 2018 1:52 pm
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Location: Finland
According to this document JMP and JRS first fetch the low address byte and then few cycles later copy it to PCL and at the same time fetch high address byte to PCH. Where is the low address byte kept until its copied to PCL? My first assumption was that it was kept at Input Data Latch (DL), but since the high address byte has to go through there as well that could cause a conflict.

I'm using this picture as a reference of the CPU's internal design.


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