6502 interrupt clock cycles

Discuss emulation of the Nintendo Entertainment System and Famicom.

Moderator: Moderators

Post Reply
marraui
Posts: 1
Joined: Tue Mar 24, 2020 9:55 am

6502 interrupt clock cycles

Post by marraui » Tue Mar 24, 2020 10:22 am

Hi everyone, I'm new to this so please be gentle

I started writing and emulator for the 6502 with the goal of eventually building my own NES emulator. I've got most of its implementation done already, but there's something I'm not really sure about.

I've been trying find out how many clock cycles it takes for the 6502 to deal with each of the interrupts. I've found quite a bit of info but sometimes it contradicts and I'm not sure which ones right and which one isn't.

In the instruction manual http://archive.6502.org/books/mcs6500_f ... manual.pdf in page 131 in example 9.2 there's a table specifying a general sequence for all interrupts that lasts 8 cycles.

However here http://6502.org/tutorials/interrupts.html in section 1.3 Getting to the nuts and bolts, second paragraph. It says that the IRQ specifically takes 7 cycles. Also, I'm using javidx9's repository as a general guideline whenever I get lost (https://github.com/OneLoneCoder/olcNES/ ... lc6502.cpp), and he writes in his code that a reset and nmi both take 8 cycles just like the programming manual says, but that irq takes 7 cyles, and I assume this implementation is correct since it passes all rom tests

So if that is correct why does irq take one cycle less? And why doesn't either the programming manual or the datasheet mention it? If It's not then how many cycles do the interrupts take (reset, nmi, and irq).

Thanks!

hypnotron
Posts: 8
Joined: Fri Apr 17, 2020 7:21 pm

Re: 6502 interrupt clock cycles

Post by hypnotron » Sat Apr 18, 2020 8:13 am

The eighth cycle the MOS 6502 manual describes is the opcode fetch for the next instruction; as long as PC is properly set by the end of the seventh cycle, you can safely ignore the eight cycle.

Post Reply