VBL Clear time

Discuss emulation of the Nintendo Entertainment System and Famicom.

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selassje
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Joined: Sat Sep 19, 2020 6:30 pm

VBL Clear time

Post by selassje » Sat Sep 19, 2020 7:01 pm

Hi,

I am a bit confused about when the VBL flag should be cleared. The wiki page on PPU registers states :
cleared after reading $2002 and at dot 1 of the pre-render line.
I assume they mean PPU cycle = 1 here.

However the page on PPU frame timing states :
it's cleared at the start of the pre-render scanline
Which I think would mean PPU Cycle= 0

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Quietust
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Re: VBL Clear time

Post by Quietust » Sat Sep 19, 2020 7:20 pm

selassje wrote:
Sat Sep 19, 2020 7:01 pm
I am a bit confused about when the VBL flag should be cleared. The wiki page on PPU registers states :
cleared after reading $2002 and at dot 1 of the pre-render line.
I assume they mean PPU cycle = 1 here.

However the page on PPU frame timing states :
it's cleared at the start of the pre-render scanline
Which I think would mean PPU Cycle= 0
It's possible that the PPU frame timing page is simply out of date, or perhaps it's just being imprecise - I just checked in Visual 2C02, and the VBL flag is definitely cleared at dot 1 (of scanline 261).

Incidentally, it's also set at dot 1 (of scanline 241).
Quietust, QMT Productions
P.S. If you don't get this note, let me know and I'll write you another.

selassje
Posts: 3
Joined: Sat Sep 19, 2020 6:30 pm

Re: VBL Clear time

Post by selassje » Sat Sep 19, 2020 7:23 pm

Thanks

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Zepper
Formerly Fx3
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Re: VBL Clear time

Post by Zepper » Sun Sep 20, 2020 6:53 am

It's how you adjust a ruler over the timeline of events. I have no problems in my emulator even if I don't set my PPU timing as precisely as +1 or -1 "idle cycle". Why? Because the "inner works" (CPU instruction level, flags) are more complex than anything else.

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