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PostPosted: Wed Mar 23, 2005 6:23 pm 
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my question is in carts who have 128k/128k

Im making it in a simple way when reg1 is written i take the value written & 0x0F. With this i locate the chr rom in the chrrom memory. The chr rom mem goes in this case to $0000 in the ppu and i swap 0x1000 bytes (4k) from the chr rom.

To locate the chr rom i do it simple:
Code:
CopyMemory(g_PPUMEM, g_lpCHRROMS + (Value & 0x0F) *0x1000, 0x1000); //For Reg 1
CopyMemory(g_PPUMEM + 0x1000, g_lpCHRROMS + (Value & 0x0F) *0x1000, 0x1000); //For Reg 2


But it seems dont work.

some things display well and other not.

Apart of that i had a question.

- When a RegX is written in mmc1 all other "counters", i mean the buffer is set to the first lsb of the register? i main again the first value written to another regX will be the lsb of the written value, and so on...?
- When mmc1 is reset, all the writes to RegX will go to the lsb of the register and then to the followin bit and so on...?

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PostPosted: Wed Mar 23, 2005 6:44 pm 
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Location: NE Indiana, USA (NTSC)
As far as I can tell, there's only one 5-bit shifter in the MMC1, and of the five writes, only the last write's address tells which register gets overwritten.


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PostPosted: Wed Mar 23, 2005 8:16 pm 
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Anes wrote:
my question is in carts who have 128k/128k
Im making it in a simple way when reg1 is written i take the value written & 0x0F.


The register is 5 bits. You should use 0x1F (not 0x0F). If you use 0x0F you're only going to be getting the first 64k of CHR -- when the game swaps to the back 64k it won't work. This is very likely your problem.

Quote:
- When a RegX is written in mmc1 all other "counters", i mean the buffer is set to the first lsb of the register? i main again the first value written to another regX will be the lsb of the written value, and so on...?


I can't really follow what you're asking here. For a breakdown of how the writes work:

The low bit of the written value goes to a temporary buffer (bit 0 gets set on the first write, bit 1 on the next, then 2, then 3, 4). Once the temporary buffer has been written to 5 times, the value gets moved from the temp buffer to the register last written to (note: only the register written to last (5th) matters... the address of the first 4 writes don't matter at all!). This is also when the effects of the write take effect (ie: when the bank is swapped)

When a game writes to the regs with the high bit set -- it clears that temporary register so that the next write will be the 1st write in the 5-write series (it also sets bits 2,3 of register 0).


Last edited by Disch on Wed Mar 23, 2005 8:42 pm, edited 1 time in total.

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 Post subject: thx
PostPosted: Wed Mar 23, 2005 8:24 pm 
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Joined: Tue Dec 21, 2004 8:35 pm
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Location: Argentina
well it seems Disch always save me from throwing away my project..
Thanks Disch.

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