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 Post subject: cpu speedPosted: Sun Jun 26, 2005 6:24 am

Joined: Thu Mar 24, 2005 3:17 pm
Posts: 355
The NES cpu runs at (236250000/11)/12 hz, that is 1789772.7272727272hz. NTSC refresh rate is 60/1.001 hz, that is 59.94005994005994005994005994005994hz. 3 PPU cycles take 1 CPU cycle, there are 341 PPU cycles in one scanline, and 262 scanlines in one frame.

Now, if I calculate the NES cpu speed, based on PPU cycles, which most emulators base their timing on, I get a wrong result: ((262*341)*(60/1.001))/3=1785054.945055hz. Or does the NES perhaps use a funky refresh rate ?: ((236250000/11)/12)/((262*341)/3)=60.098478hz.

I've tried decreasing the 3:1 ratio, but that's causing huge problems.

*edit* Or does the NES use interlacing ? That would mean there are 263 lines every odd frame, and it would change the ratio to 1364:455.

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 Post subject: Posted: Sun Jun 26, 2005 8:37 am

Joined: Sun Sep 19, 2004 10:59 pm
Posts: 1393
It's the latter; the NES PPU uses the funky refresh rate you calculated of ~60.098Hz. An audio recording timed by NMIs proves this, as it will not synchronize properly with a recording timed at 59.94Hz or even 60Hz.

Evidently, the PPU's odd refresh rate is close enough to NTSC that television sets don't seem to mind and can display it anyways.

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 Post subject: Posted: Sun Jun 26, 2005 9:11 am

Joined: Thu Mar 24, 2005 3:17 pm
Posts: 355

I won't blame anyone on errors, since this post is quite old: http://nesdev.com/cgi-bin/wwwt ... =#Post1171

"Assuming \$4017 is written with \$00 at the beginning of the VBL handler. The VBL interrupt occurs slightly less often than every 1/60 second, so the fourth step occurs slightly before the next VBL interrupt."

In this case, the frame IRQ wouldn't be fired at all then ? Since the PPU refresh rate is faster than the frame sequencer.

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 Post subject: Posted: Sun Jun 26, 2005 10:37 am

Joined: Sun Sep 19, 2004 10:59 pm
Posts: 1393
NTSC Frame IRQs, as it has been determined, occur every 29830 CPU cycles, which works out to almost exactly 60Hz.

Also, there is no reason why both Frame IRQs and PPU NMIs cannot occur simultaneously, since they are from entirely independent sources.

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Quietust, QMT Productions
P.S. If you don't get this note, let me know and I'll write you another.

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 Post subject: Posted: Sun Jun 26, 2005 11:00 am

Joined: Thu Mar 24, 2005 3:17 pm
Posts: 355
Well, NMI's occur every (262*341)/3=~29781 CPU cycles, so if you'd reset the frame sequencer, and enable frame IRQ's right at the start of the NMI handler by writing 0 to 0x4017, the frame IRQ would never happen, since it would start counting down again from 29830, and never reach zero. Right ?

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 Post subject: Posted: Sun Jun 26, 2005 11:14 am

Joined: Sun Sep 19, 2004 10:59 pm
Posts: 1393
If you're going to use Frame IRQs, you write 0 to \$4017 once and never write to it again so it stays timed properly.

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Quietust, QMT Productions
P.S. If you don't get this note, let me know and I'll write you another.

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 Post subject: Posted: Sun Jun 26, 2005 12:06 pm

Joined: Fri Nov 12, 2004 2:49 pm
Posts: 7316
Location: Chexbres, VD, Switzerland
As far I know, the only game that uses frame IRQ is Dragon Quest. Dragon Warrior uses NMIs to time the sound code, and you'll notice that no difference at all is audible between thoose two.
But, does someone knows at wich rate are frame IRQ fired on a PAL system ? Is it also 60Hz, or would it be slowed to 50 Hz like the refresh rate ? If it's 60Hz, it could prevent the music of a game to run slower if it uses frame IRQ.

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 Post subject: Posted: Sun Jun 26, 2005 2:25 pm

Joined: Sun Sep 19, 2004 11:12 pm
Posts: 19346
Location: NE Indiana, USA (NTSC)
Given all the other differences between PAL and NTSC timing, including the timing for any raster effects, it's probably best to make two separate builds of a game and just scale the BPM differently on PAL.

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 Post subject: Posted: Sun Jun 26, 2005 4:43 pm

Joined: Thu Mar 24, 2005 3:17 pm
Posts: 355
Not only Dragon Quest is using it. In my emulator, these games had problems before emulation of frame IRQ's, and are working fine now:

Qix: locked up when starting a game
Door Door: locked up when dying
Shin 4 Nin Uchi Mahjong: locked up at the title screen

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 Post subject: Posted: Tue Jul 05, 2005 4:05 pm

Joined: Wed Nov 10, 2004 6:47 pm
Posts: 1845
The Maj Jong game you mentioned uses Frame IRQs for music generation (rather than being NMI driven). I remember because before I had frame IRQs working right the tempo of the music was off.

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 Post subject: Posted: Tue Jul 05, 2005 5:39 pm
 Formerly Fx3

Joined: Fri Nov 12, 2004 4:59 pm
Posts: 3076
Location: Brazil
Q said that FireHawk just requires correct FrameIRQ emulation in order to get it working. I can hear music in both games you mentioned. So, what's up?

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Zepper
RockNES developer

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 Post subject: Posted: Tue Jul 05, 2005 9:12 pm

Joined: Sun Sep 19, 2004 10:59 pm
Posts: 1393
Fire Hawk does not use frame IRQs - it uses DPCM IRQs. There's a rather significant difference.

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Quietust, QMT Productions
P.S. If you don't get this note, let me know and I'll write you another.

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 Post subject: Posted: Wed Jul 06, 2005 7:47 am
 Formerly Fx3

Joined: Fri Nov 12, 2004 4:59 pm
Posts: 3076
Location: Brazil
Quietust wrote:
Fire Hawk does not use frame IRQs - it uses DPCM IRQs. There's a rather significant difference.

Ah... a misunderstanding I suppose. OKay, it makes the things a lot easier.

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Zepper
RockNES developer

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 Post subject: Posted: Tue Jul 12, 2005 1:04 pm

Joined: Thu Mar 24, 2005 3:17 pm
Posts: 355
Has Stars SE Demo (PD) been developed (or tested afterwards) on a real NES ? APU docs say frame IRQs are enabled on boot, but if I do this in my emulator, that demo will just hang with a black screen. If I don't enable frame IRQs on boot, it will work.

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 Post subject: Posted: Tue Jul 12, 2005 7:59 pm

Joined: Mon Sep 27, 2004 8:33 am
Posts: 3715
Location: Central Texas, USA
I ran the following code, which supports the assertion that the APU frame interrupt is enabled (\$4017=\$00) on power-up. When run it beeps. If the frame interrupt is disabled, it doesn't beep.

Code:
reset:
lda   #250        ; delay 1/4 second
jsr   delay_msec

;lda  #\$40        ; disable apu frame interrupt
;sta  \$4017

lda   \$4015       ; clear any pending frame interrupt
; (in case it's set at power-up but not set afterwards)

forever:
jmp   forever

irq:
lda   #\$82        ; play beep
sta   \$4000
lda   #\$01
sta   \$4001
sta   \$4002
sta   \$4015
sta   \$4003

jmp   forever

nmi:
rti

.org \$fffa
dw    nmi
dw    reset
dw    irq

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