I just write this cos disch put in a post that 256 cycles is not necessary 256 scanline pixels while i thought it was. Taking account that ppu mem can be acceded every 2 cc (what i dont know what that means) it makes sense cos 341 / 2 = 170 memory access (as 2C02 tech ref. says).
is 1ppu cycle-1 pixel?
1 ppu cycle != 1 pixel ?
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