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PostPosted: Sat Aug 27, 2011 8:43 am 
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I am re-writing my PPU code, and something dawned on me..

The PPU has a maximum fine x scroll value of 8 (exclusive), keep this in mind. The PPU also fetches 2 background tiles at the end of each scanline, for the next scanline. Lastly the PPU fetches 32 background tiles while rendering during dots 0-256.

That makes 34 background tiles, at 8 pixels each which gives us 272 background pixels. The screen is 256 pixels wide.

256 + 8 = 264
264 / 8 = 33

The maximum you could ever need is 33 background tiles, so is the last fetch (248-256) even necessary? Is a tile discarded somewhere? Am I missing something?


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PostPosted: Sat Aug 27, 2011 8:50 am 
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It's fetched and always discarded by the PPU. But MMC2 and MMC4 depend on the fetch to trigger bankswitches, and a supermapper like MMC5 may depend on it to trigger scanline count transitions and switches between the set of CHR banks for the background and the set of CHR banks for 8x16 pixel sprites.


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PostPosted: Sat Aug 27, 2011 8:55 am 
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So when emulating, all I have to do is make sure the address gets updated, correct? I don't have to actually fetch/store that last tile?

Also, when exactly is the 'x scroll' portion of the $2005/$2006 address reset? Loopy's document says it's at the beginning of the scanline, but that would mean that the tiles fetched near the end of the scanline would have to be immediately after the other tiles in the name tables? It seems to make more sense to me that the 'x scroll' is reset at the end of dot 255 or thereabouts.


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PostPosted: Sat Aug 27, 2011 9:22 am 
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beannaich wrote:
So when emulating, all I have to do is make sure the address gets updated, correct? I don't have to actually fetch/store that last tile?

You have to go through the motions of fetching on the PPU address bus so that the mapper sees the side effects of the fetch, but you need not actually load the fetched pattern or attribute data into the unpack shifter.

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Also, when exactly is the 'x scroll' portion of the $2005/$2006 address reset?

The last two background fetches occur at x=241-247 and x=249-255, the nine bits corresponding to the Y scroll are updated at x=251, and the six bits corresponding to the X tile position are restored at x=257.


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PostPosted: Sat Aug 27, 2011 9:27 am 
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tepples wrote:
You have to go through the motions of fetching on the PPU address bus so that the mapper sees the side effects of the fetch, but you need not actually load the fetched pattern or attribute data into the unpack shifter.


Okay, well that just saved me 1 fetch routine! :)

tepples wrote:
The last two background fetches occur at x=241-247 and x=249-255, the nine bits corresponding to the Y scroll are updated at x=251, and the six bits corresponding to the X tile position are restored at x=257.


What about the pre-render scanline? Does the same update/reset logic occur then as well?


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PostPosted: Sat Aug 27, 2011 9:48 am 
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On line -1, the whole VRAM address is updated at x=304 but only if rendering is turned on. The primary purpose of line -1 is to do the preroll fetches to prime the background shifters, and possibly (though not fully investigated) to clear the secondary OAM.


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PostPosted: Sat Aug 27, 2011 10:13 am 
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And the pre-render scanline makes the exact same fetches as the other 240 visible scanlines? Does it leave out sprite fetches? Sorry for all the questions, is there a document that is up to date and accurate that has this kind of info in it?


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