Timing of branch instructions and phantom reads

Discuss emulation of the Nintendo Entertainment System and Famicom.

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haydenmuhl
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Timing of branch instructions and phantom reads

Post by haydenmuhl » Mon Jul 16, 2012 2:37 pm

I'm writing my own NES emulator, and am trying to understand the timing of branch instructions. I have been reading 6502.txt and 6502_cpu.txt, along with the reference on obelisk.demon.co.uk. Some of the information regarding the timing seems a bit fuzzy, so I just need to check that I'm reading it correctly.

As best I can tell, branch instructions can take either 2, 3 or 4 clock cycles to complete. Two cycles to read the opcode and offset, one more cycle if the branch is taken, and one more still, if that branch must cross a page boundary. Is this correct?

When I was originally reading the Obelisk documentation I thought that it meant the branch would either take (2), (2+1) or (2+1+2) clock cycles. Looking at 6502_cpu.txt, it does list five clock cycles for the relative addressing mode, but that fifth clock cycle looks like it is actually the first clock cycle of the next instruction. 6502.txt seems more clear on the subject, saying that branch instructions take (2), (2+1), or (2+2) clock cycles.

This gets to my second question. 6502_cpu.txt also lists phantom reads in the optional clock cycles 3 and 4. I understand that phantom writes are expected by some games, and if they are not emulated correctly some games will not work. It seems in this case, these reads would go into whichever register stores the opcode, but are promptly ignored. Are there any special cases where a phantom read has some odd side effects?

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Dwedit
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Post by Dwedit » Mon Jul 16, 2012 3:44 pm

Yep, 2, 3, or 4 cycles for a branch.

Ironsword relies on dummy reads to clear an APU Frame IRQ, and crashes at the title screen run if the dummy read doesn't happen.
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haydenmuhl
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Post by haydenmuhl » Mon Jul 16, 2012 8:01 pm

Thanks for the info. Very helpful.

Bisqwit
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Re: Timing of branch instructions and phantom reads

Post by Bisqwit » Tue Jul 17, 2012 11:47 am

haydenmuhl wrote:This gets to my second question. 6502_cpu.txt also lists phantom reads in the optional clock cycles 3 and 4. I understand that phantom writes are expected by some games, and if they are not emulated correctly some games will not work. It seems in this case, these reads would go into whichever register stores the opcode, but are promptly ignored. Are there any special cases where a phantom read has some odd side effects?
There is this cpu_dummy_reads test program which can detect whether phantom reads are issued correctly or not. It is not an exhaustive test though, and it does not test branch instructions.
There is also cpu_dummy_writes which verifies that read-modify-write instructions issue a dummy write when they should. It also tests a limited set of instructions.

Theoretically, the cartridge could detect a dummy read from a particular address, and act on it, but unless you're going for accuracy, you're quite safe only emulating the timing aspect of it.

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