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 Post subject: PPU timing
PostPosted: Sun Feb 17, 2013 6:24 pm 
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Formerly Fx3
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Location: Brazil
Quick recap: my emulator runs 1 CPU cycle after 3 PPU dots. So, there's an alignment between CPU and PPU after a few cycles, you probably know.

It's not really a question, but something I noticed to be picky: if the PPU "exits" at dot 340 (meaning the CPU is going to run for one cycle), the VBlank flag must be cleared, since subsequent writes to $2000 might occur. It's quite clear on nmi_on_timing test, since it was unclear to me why a NMI should be ignored on dot zero.

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