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 Post subject: NSF header question
PostPosted: Thu Mar 06, 2014 2:36 pm 
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Joined: Sun Nov 17, 2013 8:14 pm
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Location: Bowie, Maryland
Hi guys and gals
I need to confirm a question regarding the NSF header and banking control. I think I understand
Kevin Horton from NSF spec txt wrote:
When the song is loaded into RAM, it is loaded into
the banks and not the 6502's address space. Once this is done, then the
bank control registers are written to set up the inital bank values.
To do this, the value at 0070h in the file is written to 05ff8h, 0071h
is written to 05ff9h, etc. all the way to 0077h is written to 05fffh.

When he mentions " loaded into RAM" he is referencing his hardware or a emulator NSF Player, right?
So If I had song data contiguous in say a flash device starting at $00. Loading $00 at reg $5FF8 would map a 4K block to the 2A03 address $8000 and loading $5FF9 with $01 would map the next 4k block to $9000.
Right ?
Yogi


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 Post subject: Re: NSF header question
PostPosted: Thu Mar 06, 2014 2:48 pm 
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Joined: Sun Jan 22, 2012 12:03 pm
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Location: Canada
There are two different cases:

1. Not bankswitched.
- You have a 40k block of RAM mapped to $6000.
- Copy the data from the NSF to the LOAD address in this block.
- Write protect $8000 to $FFFF, or if FDS expansion is used write protect only $E000-$FFFF.

2. Bankswitched.
- You have a 1MB block of RAM that is banked by the registers starting at $5FF8.
- Copy the data from the NSF to your RAM starting at an offset of LOAD & $0FFF.
- The bankswitch registers select a 4k bank from your RAM.
- The initial bank list should be applied before calling INIT.
- FDS NSFs can bank $6000, see the special rules for this.

For most NSFs, the RAM at $6000 can be omitted, and you could do with simply 32k of RAM at $8000, but some NSFs do need it.


Also, I highly advise reading the definition of the format on the wiki instead of the TXT file kevtris wrote 14 years ago. I'd like to think we've made things a little clearer by now:
http://wiki.nesdev.com/w/index.php/NSF


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 Post subject: Re: NSF header question
PostPosted: Thu Mar 06, 2014 4:55 pm 
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Joined: Sun Nov 17, 2013 8:14 pm
Posts: 133
Location: Bowie, Maryland
rainwarrior wrote:
There are two different cases:

1. Not bankswitched.
- You have a 40k block of RAM mapped to $6000.
- Copy the data from the NSF to the LOAD address in this block.
- Write protect $8000 to $FFFF, or if FDS expansion is used write protect only $E000-$FFFF.

2. Bankswitched.
- You have a 1MB block of RAM that is banked by the registers starting at $5FF8.
- Copy the data from the NSF to your RAM starting at an offset of LOAD & $0FFF.
- The bankswitch registers select a 4k bank from your RAM.
- The initial bank list should be applied before calling INIT.
- FDS NSFs can bank $6000, see the special rules for this.

OK

Quote:
I'd like to think we've made things a little clearer by now:
http://wiki.nesdev.com/w/index.php/NSF

Thanks, but the part that is confusing is the example
Quote:
METROID.NSF will be used for the following explanation.

The file is set up like so: (starting at $070 in the file)

$070: 05 05 05 05 05 05 05 05
$078: 00 00 00 00 00 00 00 00
$080: ... music data goes here...
Since $070-$077 are something other than $00, this NSF is using bank switching. The load address given is $8000. The load address AND $0FFF specifies 0 bytes of padding, so we set up our ROM image with contiguous data starting from $080 in the file.

This implies that each reg is weighted by 4K. So reg $5ff8 has an offset of 0 + the load address + (header $70 byte x 4K). And $5ff9 would be 4K + Load address+ (header $71 byte x 4K). And writing $05 to the 8 regs creates a 32K ROM at $8000.
Thanks,
Yogi


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 Post subject: Re: NSF header question
PostPosted: Thu Mar 06, 2014 5:07 pm 
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Joined: Sun Jan 22, 2012 12:03 pm
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Location: Canada
When bankswitching is used, the high nibble of the LOAD address is to be ignored. Another way of thinking about it is that LOAD is just bytes of padding at the start of the ROM image you are building from the NSF file.

Yes, the number written to a bankswitch register specifies a 4k offset from the beginning of the ROM image you've created. In the hardware, the bits 12-14 of the CPU memory address will in your mapper look up the number stored in the register, and the resulting 8-bits become address lines 12-19 of your 1MB RAM chip.


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 Post subject: Re: NSF header question
PostPosted: Thu Mar 06, 2014 8:55 pm 
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Joined: Sun Nov 17, 2013 8:14 pm
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Location: Bowie, Maryland
Thank you that clears things up for me somewhat.
With the wiki example again $070: 05 05 05 05 05 05 05 05
Quote:
This NSF has 6 4k banks in it, numbered 0 through 5. It specifies that each of the 8 memory regions should be switched to bank 5,"

Would this imply that 'bank 5' is >24K? or are all the 6502 PRG banks pointing to the same 4K block?
Quote:
which begins at $05 * $1000 bytes in the ROM image.

Anyways, thanks again
Yogi


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 Post subject: Re: NSF header question
PostPosted: Thu Mar 06, 2014 10:40 pm 
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All of them are pointing at the same 4k block.


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 Post subject: Re: NSF header question
PostPosted: Sat Mar 08, 2014 8:10 am 
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Location: Bowie, Maryland
rainwarrior wrote:
All of them are pointing at the same 4k block.

OHHH.Now it makes sense!
Yogi


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