MMC3 on CPLD

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infiniteneslives
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Re: MMC3 on CPLD

Post by infiniteneslives » Mon Mar 31, 2014 11:13 am

FARID wrote:Can you introduce me some up to date and reliable source? (other than wiki)
It really doesn't get more up to date than the wiki as it's the only living documentation as of today. Disch's docs and kevtris are your only real alternatives to the wiki when it comes to mapper info. The wiki is strongly based on Disch's docs though.

Having once been in your shoes I understand the frustrations of trying to understand the hardware when nearly all documentation is written from a software perspective (either NES programming or emu development). Kevtris is the only one that gives things from a hardware perspective. But his documentation requires a general understanding of the NES and mapper design to fully grasp.

If you stick with it long enough, once you understand the basics of mapper design all the docs start to make sense regardless of the perspective.
If you're gonna play the Game Boy, you gotta learn to play it right. -Kenny Rogers

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Re: MMC3 on CPLD

Post by tepples » Mon Mar 31, 2014 12:43 pm

You have two separate problems.

The first problem is how to translate mapper port writes into changes to the mapper's state. For example, how to detect a write to $8000 or $8001 and how to handle it.

The second problem is how to do the mapping. The mapper needs to translate its state and the cart edge address into a ROM address using a bank of multiplexers (or "muxes" for short). The upper address lines (e.g. PPU A12-A10) feed into the select inputs of a bank of 8:1 multiplexers, one for each bit in the bank number, and the outputs go to the ROM. MMC3 has eight of them for CHR banks and six for PRG banks. There is one mux for CHR A10, one for CHR A11, one for CHR A12, ..., one for CHR A17, one for PRG A13, one for PRG A14, ..., and one for PRG A18. The mux for CHR A13, for example, has bit 3 of each of the six CHR bank registers as inputs.

Just the $8000 and $8001 logic requires 63 macrocells as flip-flops (5 for $8000, 7 each for regs 0 and 1, 8 each for regs 2-5, 6 each for regs 6-7) plus extra macrocells to act as the muxes and handle the write decoding. The most common simplification to fit into a smaller CPLD is dropping support for the largest ROMs, which saves a mux and 6 flip-flops per omitted CHR bank output or a mux and 2 flip-flops per omitted PRG bank output.

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kyuusaku
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Re: MMC3 on CPLD

Post by kyuusaku » Wed Jul 16, 2014 1:37 pm

HardWareMan wrote:the scheme is taken from someone's working draft of a project, maybe even PowerPack.
For posterity it's from artoh's FunkyFlashCart project:

viewtopic.php?f=9&t=463

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FARID
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Re: MMC3 on CPLD

Post by FARID » Wed Jul 16, 2014 9:02 pm

@ kyuusaku
Thank you!

I found this too :
All documentation regarding the FunkyFlash is now available to the public and the files are available below.
THE NES FUNKY FLASH CARTRIDGE

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byemu
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Re: MMC3 on CPLD

Post by byemu » Wed Jul 16, 2014 9:49 pm

FARID wrote:@ kyuusaku
Thank you!

I found this too :
All documentation regarding the FunkyFlash is now available to the public and the files are available below.
THE NES FUNKY FLASH CARTRIDGE
try?

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FARID
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Re: MMC3 on CPLD

Post by FARID » Wed Jul 16, 2014 10:12 pm

No I didn't try it yet
TLROM needs 127 Macrocells.
Oh by the way PNROM is also available and needs only 57 Macrocells.
Attachments
PNROM.PNG
TLROM.PNG

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byemu
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Re: MMC3 on CPLD

Post by byemu » Mon Jul 21, 2014 12:43 am

FARID wrote:No I didn't try it yet
TLROM needs 127 Macrocells.
Oh by the way PNROM is also available and needs only 57 Macrocells.
You completed yet?

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FARID
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Re: MMC3 on CPLD

Post by FARID » Mon Jul 21, 2014 2:37 am

byemu wrote:You completed yet?
I don't work on this project anymore
Because I couldn't find any suitable CPLD (5V + 44 pin + 128 Macrocells)

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byemu
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Re: MMC3 on CPLD

Post by byemu » Mon Jul 21, 2014 7:23 am

FARID wrote:
byemu wrote:You completed yet?
I don't work on this project anymore
Because I couldn't find any suitable CPLD (5V + 44 pin + 128 Macrocells)
only xc9572xl now
72macrocells
44pin
output 3.3v
input 3.3 or 5v

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getafixx
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Re: MMC3 on CPLD

Post by getafixx » Fri Jul 25, 2014 8:45 pm

Farid, the XC95144 chip they used on that cart are on eBay if you were still looking for some.

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FARID
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Re: MMC3 on CPLD

Post by FARID » Sat Jul 26, 2014 12:38 am

@ getafixx
Thank you
But it still has a lot of pins!
I am looking for something similar to the original MMC3 (44pin + 5V + 128Macrocells)
If anyone is aware of such a CPLD please let me know

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byemu
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Re: MMC3 on CPLD

Post by byemu » Thu Sep 04, 2014 1:51 am

FARID wrote:@ getafixx
Thank you
But it still has a lot of pins!
I am looking for something similar to the original MMC3 (44pin + 5V + 128Macrocells)
If anyone is aware of such a CPLD please let me know
Image
or this img:http://savepic.net/6093678.jpg
Today, I try to make my own mmc3 cart,I found mmc3 not need 127Macrocells.
maybe 72Macrocells is enough.
I still have not completed
When I finished it can be determined how much macrocells need.

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Re: MMC3 on CPLD

Post by tepples » Thu Sep 04, 2014 6:20 am

I'm pretty sure 72 isn't enough for full CHR bank bits and full scanline counter function. Regs $8000-$A001 take up 54 cells by themselves (46 for bank bits and 8 for reg values), the IRQ counter is 19 (counter + reload + various state), and there usually need to be a few more for logic.

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Re: MMC3 on CPLD

Post by nikita600 » Tue Sep 16, 2014 10:02 pm

FARID wrote:
byemu wrote:You completed yet?
I don't work on this project anymore
Because I couldn't find any suitable CPLD (5V + 44 pin + 128 Macrocells)
I think you never find CPLD like this: (5V + 44 pin + 128 Macrocells). By the way if you find, you cannot made full implementation of MMC3, because CPLD needs programming interface and etc and you didn't have enough pins.

P.S. Sorry for my english.
P.S.S. And this is my full implementation FME-7 on XC9572:
Image

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getafixx
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Re: MMC3 on CPLD

Post by getafixx » Wed Sep 17, 2014 11:16 am

Would you be willing to share the design files for that? Looks like you've got it split over 2 XC9572 chips?

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