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PostPosted: Wed Apr 04, 2018 2:37 am 
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koitsu wrote:
Of course, if this can't be done with the PowerPak, then it's completely moot for me to even bring up (and then I'll feel like I was wasting everyone's time). All I know is that the Xilinx FPGA does in fact have some on-board or on-die RAM, since the PowerPak is advertised as having "extra graphics ram for four screen games and MMC5 exram". NES ZP/RAM is 2KBytes, and RAM for 4-screen games tends to be 2KBytes; MMC5 ExRAM is only 1KB. I don't know if the FPGA RAM for 4-screen games could temporarily be used as a storage buffer for (a copy of) NES ZP/RAM on power-on or not. I don't do FPGA stuff, nor do I have familiarity with the system.

AFAIK you don't want to look at the FPGA here. It'll be uninitialized (i.e. useless) at power-on. You want to look at the BIOS code that runs at boot, and whether or not it has any ability to map the onboard RAM before the FPGA gets set up. If that RAM is inaccessible before the FPGA is programmed, you might be SOL.

Though, at the same time the FGPA setup RAM usage requirement might be very low. You could probably compromise with only a few bytes clobbered (or even store them in PPU memory if it's less important).

Though IMO, my own experience with the memory test is that the power on values of RAM aren't useful, at least on my machines. Any decent RNG would be an OK substitute, but like I feel about emulators a wipe is a better default option for non dev testing purposes.


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PostPosted: Wed Apr 04, 2018 4:38 am 
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rainwarrior wrote:
koitsu wrote:
Of course, if this can't be done with the PowerPak, then it's completely moot for me to even bring up (and then I'll feel like I was wasting everyone's time). All I know is that the Xilinx FPGA does in fact have some on-board or on-die RAM, since the PowerPak is advertised as having "extra graphics ram for four screen games and MMC5 exram". NES ZP/RAM is 2KBytes, and RAM for 4-screen games tends to be 2KBytes; MMC5 ExRAM is only 1KB. I don't know if the FPGA RAM for 4-screen games could temporarily be used as a storage buffer for (a copy of) NES ZP/RAM on power-on or not. I don't do FPGA stuff, nor do I have familiarity with the system.

AFAIK you don't want to look at the FPGA here. It'll be uninitialized (i.e. useless) at power-on. You want to look at the BIOS code that runs at boot, and whether or not it has any ability to map the onboard RAM before the FPGA gets set up. If that RAM is inaccessible before the FPGA is programmed, you might be SOL.

FPGA takes care of mapping that RAM so it's not accessible before it has been programmed. However, the FPGA can be programmed simply by copying a bunch of bytes from the BIOS ROM to the FPGA configuration register and in fact the default BIOS does this as one of the very first things at bootup. Unfortunately IIRC the BIOS ROM is not self-flashable (unlike it's on SNES PowerPak), so replacing it is not so easy. By replacing the BIOS ROM it should be possible to back up the initial RAM contents to the FPGA's on-chip RAM or one of the 512 KiB RAMs used for PRG/CHR, but it's a lot of work for very little gain.

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PostPosted: Wed Apr 04, 2018 12:39 pm 
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Okay, then we'll consider the matter closed.


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PostPosted: Wed Apr 04, 2018 2:31 pm 
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Well, the alternative of simulating it with an RNG from the loader is still quite viable. Or wiping it, as the power mappers are apparently already doing.


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