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PostPosted: Sat Dec 23, 2017 1:28 pm 
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Joined: Thu May 19, 2005 11:30 am
Posts: 619
PRG and CHR banking of this 4-in-1 multicart can be emulated well using GNROM banking, but unlike GNROM, mirroring must be selectable, as at least one of the four games requires Horizontal and one requires Vertical mirroring. Unfortunately, I've not been able to successfully trace the CIRAM A10 line, and it's not obvious from the menu's writes which bit selects the mirroring type. The menu writes the same data to $4120 and to an address in the $8000-$FFFF region that already has the data in it as the byte being written. The data written by the menu is:
Code:
Game                    Mirr    Data    Addr (X=0-3)
----------------------------------------------------
Puzzle                  H       00      FFE9+X
F15 City War            H       14      FFE9+X
Venice Beach Volley     V       28      FFE9+X
Poke Block              H/V     3C      FFE9+X


Attachment:
MGC-026_front.JPG
MGC-026_front.JPG [ 872.7 KiB | Viewed 637 times ]

Attachment:
MGC-026_back.JPG
MGC-026_back.JPG [ 856.56 KiB | Viewed 637 times ]


Last edited by NewRisingSun on Sat Dec 23, 2017 3:59 pm, edited 1 time in total.

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PostPosted: Sat Dec 23, 2017 2:43 pm 
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Joined: Sun Apr 13, 2008 11:12 am
Posts: 7397
Location: Seattle
Two of the 74'32s are dummied out. The other two seem to combine /ROMSEL and R/W (to generate /LATCH) and PPU A13 and PPU /RD (to generate CHR /OE).

Best guess:
* The 74'00 as a whole serves as a single one-of-two multiplexer, taking Q0 from the 74'174, generating /Q0, and NANDing PPU A10 and PPU A11 with these two signals before connecting the output to VRAM A10.
* 74'174 D0 seems to be connected to CPU D5

This is at least consistent with the values written...


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PostPosted: Sat Dec 23, 2017 5:19 pm 
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Joined: Mon Dec 12, 2011 8:15 pm
Posts: 427
mirr (data>>3)&0x01


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