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PostPosted: Fri Nov 09, 2018 8:38 pm 
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I would like to make a repro of Urusei .
I cannot find the pin out of JALECO-JF-10.

Both PRG and CHR are 64k ( m27c512 ) DIP 14

I will use the original famicom japanese game to do the mod.

The boards has 2 time DIP 14 maskrom.

Pretty sure it can be a straight fit in without re-wiring anything,

Does anyone has info please ?

i would like to be sure before i solder them in

thank you


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PostPosted: Mon Nov 12, 2018 2:42 am 
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Location: -29.794229 -55.795374
Hello and welcome to NESDev!
AFAIK this board uses discrete logic ICs, with a 74HC139 and a 74HC74.
I'm not sure how they connect to the ROMs, can someone please trace the connections?


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PostPosted: Tue Nov 13, 2018 8:21 am 
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Let me see if I understood this mapper:

If A13=1, A14=1, /ROMSEL=0 and R/W=1 the PRG bits D0 and D1 are latched on the flip-flop that controls CHR A13 and A14 lines.

Is it correct?


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PostPosted: Wed Nov 14, 2018 4:32 am 
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I tried to trace the circuit and ended with this incomplete (and badly drawn) schematic:

Code:
                           
           +--CPU A13        ?   M2?
 +-----+   |  +--CPU A14  CPU R/W |  +--/ROMSEL
 |   __|?__|__|___          ___|__|__|___
 |  | /EN  A  B   |        | /EN  A  B   | 
 |  |             |        |             | 74HC139
 |  | Y0 Y1 Y2 Y3 |        | Y0 Y1 Y2 Y3 |
 |   -------------          -------------
 |    ?  ?  ?  |             ?  ?  ?  |?
 +-------------|----------------------+
               +----+                 
              ---   \
      1N4148? \ /   / 1K
             -----  \
          22pf |    |
    GND----||--+----+
               |
      +--------+---------+
VCC---|-------+----------|-------+
      |    ___|___       |    ___|___
      |   |  CLR  |      |   |  CLR  |   
      +--->CK   /Q|      +--->CK   /Q|
        +-|D     Q|-+      +-|D     Q|-+   74HC74
        | |  PRE  | |      | |  PRE  | |
        |  -------  |      |  -------  |
     PRG D1   | CHR A13  PRG D2  |  CHR A14
              +------------------+
              |     
             VCC         


I'm not sure, but the 2nd decoder of the 74HC139 probably has the A input pulled high, low or is plugged together on the B input.
Depending of the configuration I cited above one of the outputs should be connected to the /EN pin of the first decoder, wich enables the flip flop latch to trigger its outputs based on the data input.
I'm not sure if the PRE pins should be floating as they are.


I also may be totally wrong on my assumptions...
Can someone please correct me and fill the blanks?
Since I never had a board like this I'm just looking at pictures.

If the OP can check this out that would be a big help!
Thanks in advance.

Edit: Filled some blanks. The PRE pins seem to be pulled high.
Not sure if it's correct.


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PostPosted: Thu Nov 15, 2018 7:16 am 
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A better drawn schematics:
Attachment:
File comment: Drawn with Eagle
Mapper 87.png
Mapper 87.png [ 8.72 KiB | Viewed 1284 times ]

Still have the same doubts. :oops:
Hope the OP or someone else can solve them. :D


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PostPosted: Thu Nov 15, 2018 10:57 am 
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Hi thanks for the help, i will help you once i get the actual donor cart, should be next week.
Ill let you know where those traces go
thank you for your help


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PostPosted: Fri Nov 16, 2018 11:59 am 
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Posts: 7823
Location: Seattle
Lum no Wedding Bell is mapper 87 ≅ mapper 101:
https://wiki.nesdev.com/w/index.php/INES_Mapper_101

The PRG and CHR are standard 28-pin 32 KiB ROMs, compatible with almost any other 28-pin ROM.


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