Getsufuu Maden / discrete clone of VRC2 (a kind of)

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krzysiobal
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Joined: Sun Jun 12, 2011 12:06 pm
Location: Poland

Getsufuu Maden / discrete clone of VRC2 (a kind of)

Post by krzysiobal » Sat Jul 11, 2020 8:51 am

Well, not really whole VRC2, just the subset used by (modified) Getsufuu Maden.

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$8000-$bfff: [M...PPP.]
              |   ||||
              |   ++++- 16k PRG bank at $8000 ($c000 gets -1 bank)
              +-------- mirroring (0=V, 1=H)
	
$b000 [.CCCCCC.] - 2k CHR bank at $0000
$c000 [.CCCCCC.] - 2k CHR bank at $0800
$d000 [.CCCCCC.] - 2k CHR bank at $1000
$e000 [.CCCCCC.] - 2k CHR bank at $1800
First time I see cartridge using 7483 chip (adder). And I always thought that all 74xx chips have GND and VCC in the opposite corners, looks like there are exceptions). Because VRC2 has its CHR-register banks laid in non-aligned addresses, it would require a lot of logic to map them to corresponding PPU range. So.. they added 1 to the CPU address bits and voila

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  CPU registers                     PPU banks
fedcba9876543210	              dcba9876543210         
1011************ = $b000   ->     000*********** = $0000
1100************ = $c000   ->     001*********** = $0800
1101************ = $d000   ->     010*********** = $1000
1110************ = $e000   ->     011*********** = $1800
  ||                               ||
  |+-------------------------------|+
  +--------------------------------+
Notes:
* VRC2 is able to 8kB PRG banking, but Getsufu Maden seems to always set two consecutive PRG banks, which results in 16 kB banks
* VRC2 is able to 1kB CHR banking, but Getsufu Maden seems to always set two consecutive PRG banks, which results in 2 kB banks
* I don't have access to PCB but I don't see CPU-A13 line going to U3.9 so writes to $b000-$bfff CHR bank also triggers write to PRG bank (but it looks like the routine is always executed from fixed bank and then PRG is set, so maybe it does not matter)
This PCB seems to be similar in design (probably the same manufacturer) to FC02

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