SP-80 Nes-On-Chip based famiclone

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krzysiobal
Posts: 676
Joined: Sun Jun 12, 2011 12:06 pm
Location: Poland

SP-80 Nes-On-Chip based famiclone

Post by krzysiobal » Tue Mar 03, 2020 5:33 pm

I got an interesting (remains of) console. Previous owner must have used it to feed his dog, because half of the board (including the connector) was gone. Rare thing is that despite NES-on-chip, there are external WRAM and VRAM memories. I desoldered them and tested, but both were broken. That didn't make me optimistic about life of NOC, but something internally suggested me that I should give him a chance.

First thing was to desolder NOC and trace the signals and restore pinout. Using cartridge connector and expansion port as reference revealed meaning of most pins. Such chips have pin order very similar to cartridge connector, so that all signals can be routed on PCB on only single layer with minimal number of external jumpers.
Image Image Image

Next step was to try to run it externally with minimal set of components (only power supply and input clock) and see if it generates something on its video output. The signal was present, M2 also was toggling, so far so good.
Image Image

Next step was to check the GND/VCCs, because there were more than one. It turned out that:
* pins 1/30/71 were connected internally (GNDs)
* pins 32/62 were also conneted to GND on the main PCB, but the small NOC PCB does not have them routed to anything
* pins 13/52 were both connected to VCC, but they are not directly connected inside NOC. When running the NOC with only pin 13 tied to +5V, voltage of logic 1 is around 2.5V. Connecting both to +5V made it right.
* there is something interesting with the pins 15/22/17/29. There is probably something with audio involved.
Image
* pin 11 was tried to GND and shored on the NOC PCB also to GND, but after cutting the track, there does not seem to be direct internal connection to GND, but apparently there is some voltage drop.
Image

Next goal was to make it run. I was sceptic about fixing the old PCB, so I designed brand new one, according to the rev-ed schematics.
Image Image Image

After soldering, it ran from first power-up, but the video was blurry. I used BC327 as PNP and BC337 as NPN. Probably they have too little beta value, because replacing them with BC557/BC547 restored extra sharp video.

Next thing was to determine what's goin on with the audio pins. I checked them again and it turns out that:
* pin 22 is audio out
* pin 17 is amplifier input
* pin 29 is amplifier output
After trying to feed some external signals I found that the amplifier has around 20x voltage gain and it outputs signal around 2.5V, but quickly saturates below 1.5V and above 3.5V. Probably this is intentional to make less dissorted sound.

Next unknown was pin 15. It turned out it is $4016.D2. But why all those resistors and capacitors? Well, this is exactly how it is wired in original Famicom, but there is also 'mic' between those two 10ks.

Last unknown is pin 11. I named it /DENDY/NTSC because I first thought it allows for mde sswitching, but no. It is some kind of debug pin - when tied to +5V, games does not work (even M2 stops toggling)

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After assembling the console I found out that:
* audio works quite weird - like some channels were more silent. After replacin the 100uf cap with 1uf, it started to work normally!

* $4016.D0 dies not work. This pin seems to not be connected internally (and floats). Probably this was the main reason why first owner of the console dumped it - without working joypad port, it is useless. I will make CPLD fix for this broken part.

Few reasons that make me think that this chip is something different that the well-known UM6561 (found in many famiclones, both in TQFP80 and blob versions):
* need of wiring external RAM for CPU/PPU
* need to feed proper clock signal (UM6561 needed only connecting crystal to xtal1+xtal2 and it has internal generator),
* some games, for example Codemasters' Micro Machines, which rely on obscure PPU behavior, seems to display little garbage in the center area - maybe PPU is working a little different
Image

* there is no open bus behaviour on unused $4016/$4017 bits (they're read-back as zeros), UM6561 readbacks as $40

Code: Select all

                                      _____________
                                     /             \
           PPU A0 <-     PPU A13 <- / 79 80   02 01 \ <> PPU D0      -- GND
          PPU A1 <-     PPU A12 <- / 77 78     04 03 \ <> PPU D1      <> PPU D7
         PPU A2 <-     PPU A11 <- / 75 76       06 05 \ <> PPU D2      <> PPU D6
        PPU A3 <-     PPU A10 <- / 73 74         08 07 \ <> PPU D3      <> PPU D5
          GND --      PPU A9 <- / 71 72           10 09 \ <- CLK         <> PPU D4
      PPU A8 <-      PPU A4 <- / 69 70             12 11 \ -> VIDEO       ?? ?
     PPU A7 <-      PPU A5 <- / 67 68               14 13 \ <- /RESET      -- VCC
  PPU /A13 <-      PPU A6 <- / 65 66                 16 15 \ <- $4017 D0    <- $4016 D2
  PPU /WE <-     PPU /RD <- / 63 64                   18 17 \ <- $4016 D0    <- AMP IN
    /IRQ <-          NC -- / 61 62                     20 19 \ -> $4016 CLK   <- $4017 D1
 CPU R/W <-    CPU /RMS <- \ 59 60                     22 21 / -> AUDIO OUT   <- $4017 D2
   CPU A0 <-      CPU D0 <> \ 57 58                   24 23 / <- $4017 D3    <- $4016 D1
    CPU A1 <-      CPU D1 <> \ 55 56                 26 25 / <- $4017 D4    -> OUT0
     CPU A2 <-      CPU D2 <> \ 53 54               28 27 / -> OUT2        -> OUT1
      CPU D3 <>         VCC -- \ 51 52             30 29 / -- GND         -> AMP OUT
       CPU D4 <>      CPU A3 <- \ 49 50           32 31 / -- NC          -> $4017 CLK
        CPU D5 <>      CPU A4 <- \ 47 48         34 32 / -> CPU A11     -> CPU /RAM
         CPU D6 <>      CPU A5 <- \ 45 46       36 35 / -> CPU A10     -> CPU M2
          CPU D7 <>      CPU A6 <- \ 43 44     38 37 / -> CPU A9      -> CPU A12
          CPU A14 <-      CPU A7 <- \ 41 42   40 39 / -> CPU A8      -> CPU A13
                                     \_____________/

lidnariq
Posts: 9131
Joined: Sun Apr 13, 2008 11:12 am
Location: Seattle

Re: SP-80 Nes-On-Chip based famiclone

Post by lidnariq » Tue Mar 03, 2020 6:25 pm

krzysiobal wrote:
Tue Mar 03, 2020 5:33 pm
* some games, for example Codemasters' Micro Machines, which rely on obscure PPU behavior, seems to display little garbage in the center area - maybe PPU is working a little different
That behavior is the same as what one sees if reading OAM during rendering doesn't return the current byte on the OAM evaluation bus, such as in the 2C02E. Of course, this NOAC isn't necessarily returning open bus on reads like the 2C02E: it only has to not change from a value with MSbit set to MSbit clear at X=321.

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