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.----\/----.
(n) PRG A13 -> |01 40| - +5V
(n) PRG A14 -> |02 39| - PRG A17 (r)
(s) PRG A2 -> |03 38| -> PRG A15 (r)
(s) PRG A3 -> |04 37| <- PRG A12 (s)
(n) CHR A12 -> |05 36| -> PRG A14 (r)
(n) CHR A11 -> |06 35| -> PRG A13 (r)
(n) CHR A10 -> |07 34| -> PRG A16 (r)
(r) PRG /CE <- |08 33| <- PRG D0 (s)
(n) PRG R/W -> |09 32| <- PRG D1 (s)
(r) CHR /CE <- |10 31| <- PRG D2 (s)
(n) CHR A13 -> |11 30| <- PRG D4 (s)
(n) CHR /OE -> |12 29| <- PRG D3 (s)
(n) CHR A10 -> |13 28| -> CHR A17 (r)
(n) PRG /CE -> |14 27| -> CHR A15 (r)
(n) M2 -> |15 26| -> CHR A12 (r)
(r) CHR A18 <- |16 25| -> CHR A14 (r)
(n) /IRQ <- |17 24| -> CHR A13 (r)
NC - |18 23| -> CHR A11 (r)
(w)WRAM /CE <- |19 22| -> CHR A16 (r)
GND - |20 21| -> CHR A10 (r)
`----------'
At 352400 A2 and A3 are used to map the registers order instead of A0 and A1.
CHR A18 is connected to GND through a jumper and the mapper chip CHR A18 pin is left floating.
I suspect that VRCIV pin 18 is WRAM /WE for when battery backed memory is used. 352400 board has WRAM /WE connected straight to NES R/W,
(edit: disregard this, VRC mappers do not have write protection mechanism on WRAM)
Interesting stuff:
The pinout is eerily similar to that of the VRC2 chip as most of you already know.
What's funny about VRC2 is that it seems to have an microwire eeprom interface built in (93xx eeprom type) at the four pins marked "NC" at the wiki. Board number 351179 (Jarinko Chie as example of VRC2 cart I analyzed) I suspect it maps that microwire EEPROM interface to WRAM address space. Anyone know if it has been used for any game ?
microwire EEPROM pinout:
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microwire EEPROM 93xxYY (93C66 for example)
.--\/--.
CS -> |01 08| - +5V
CLK -> |02 07| - NC
DI -> |03 06| - +5V
DO <- |04 05| - GND
`------'