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PostPosted: Mon Jan 28, 2013 12:58 am 
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thefox wrote:
yxkalle wrote:
This is great! Why not cooperate with Jonathon (jwdonal) and add HQ2X filtering into your project? Not that I have anything against pixels, but I really like the results. :D Just a thought...

I'm personally not a big fan of those type of filters, but maybe some day.

You're sitting on a frickin' Altera DE2! Don't want to put some of those logic elements to use? ;) Just kidding, keep up the good work.


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PostPosted: Fri Mar 15, 2013 11:49 am 
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I posted a short demo video of a couple of games on YouTube: http://youtu.be/uctedoSaXcU

The video quality is so bad though that you probably couldn't tell the difference even if I recorded the same footage using the normal composite output. :) Maybe some day I'll buy a real camera, or some VGA capture thing.

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PostPosted: Sat Mar 16, 2013 7:13 pm 
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This's the most exciting thing ever. I will happily throw hundreds of dollars to you to get a version that fits inside an av famicom and gives me ideally rgb / s-video so I can just wire it into the multi av port.


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PostPosted: Tue Mar 19, 2013 8:11 pm 
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Just watched the video, definitely excited about one day having this setup in my famicom or nes!


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PostPosted: Wed Mar 20, 2013 5:18 pm 
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Me three! :D


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PostPosted: Mon Apr 29, 2013 3:09 pm 
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I saw you'd commented on youtube that you have no plans or progress with this project, is there any chance you might eventually come back to it, for a self contained version you can sell?


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PostPosted: Tue Apr 30, 2013 1:02 pm 
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Tricky wrote:
I saw you'd commented on youtube that you have no plans or progress with this project, is there any chance you might eventually come back to it, for a self contained version you can sell?

Yes, definitely. I just don't have time or interest to work on this right now. As I've said before, getting it out there requires a lot of work, some on areas I'm not too familiar with (e.g. I've never done a custom PCB).

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PostPosted: Tue Apr 30, 2013 2:44 pm 
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Understandable. I'm patient, just happy to see it's still on the to-do list :) Thanks for all the work you've done!


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PostPosted: Sun May 26, 2013 2:08 pm 
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Just wanted to say I'm still interested in this project, not any attempt to rush you, I was just checking back in to see if there were any updates :)


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PostPosted: Mon Jun 03, 2013 6:17 am 
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thefox wrote:
Yes, definitely. I just don't have time or interest to work on this right now. As I've said before, getting it out there requires a lot of work, some on areas I'm not too familiar with (e.g. I've never done a custom PCB).


Have you thought about teaming up with someone who does have experience, like Krikzz, HardWareMan, Toodles or invzim? Seeing as this thread basically contains the full technical description of what you're doing, if you wait long enough someone else is just going to implement their own RGB hack based on your discovery, without cutting you in on the profits.


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PostPosted: Mon Jun 03, 2013 10:24 am 
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Muf wrote:
thefox wrote:
Yes, definitely. I just don't have time or interest to work on this right now. As I've said before, getting it out there requires a lot of work, some on areas I'm not too familiar with (e.g. I've never done a custom PCB).


Have you thought about teaming up with someone who does have experience, like Krikzz, HardWareMan, Toodles or invzim? Seeing as this thread basically contains the full technical description of what you're doing, if you wait long enough someone else is just going to implement their own RGB hack based on your discovery, without cutting you in on the profits.

Yeah I've thought about it briefly. If any of the fellas mentioned there want to partner up, feel free to PM me, although I won't have much time to work on this during the summer.

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PostPosted: Mon Jun 03, 2013 1:29 pm 
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This is sort of a tangent, but I figured I'd share:
On some level, the only hard part is intercepting the writes to the PPU; the rest is just a look-up-table. So I started coming up other ideas for what one might do with spare fuses in the FPGA. Since you're entirely wrapping the CPU side of the PPU anyway, if you considered adding some extended functionality, you'd want to make that availability detectable by the CPU.

So, here's a list, with "CPU side interceptions" first:
  • Add read-only ID register to some currently write-only register to detect presence of extended functions
  • Allow steering of $4014 DMA to $2007 instead of only $2004
  • Writeable palette (not just for bikeshedding: allows 2C04 compatibility)
  • Swap reading 2000/2001 for 2C05 compatibility
  • Mask top 8/16 scanlines to conceal pop-on; mask right 8 columns to add symmetry to $2001.
  • Other upscaling ratios other than none and 2x. (3x is somewhere between the 1280x720p and 1366x768p timings; non-integer upscaling is also possible)
  • Control overscan color (color 0, black, arbitrary)
  • Intercept CLK to detect and disable missing pixel on start of visible odd fields (skip 4 oscillations to stretch scanline; detectable by watching PPU./RD and PPU.ALE)
  • Intercept CLK to stretch scanline by one extra oscillation of the 21MHz oscillator, to achieve exact NTSC timing; stretch 2C07 by 4 oscillations per scanline for exact PAL timing
Here's a few more things you can get if you wrap the PPU address/data bus too:
  • NMI on PPU address match
  • Dual-ported access to PPU RAM during rendering (by hijacking ALE cycles; requires replacing the '373 also, but that's not difficult)
  • Irrelevantly(?) more robust palette write detection (detect palette writes by when PPU address is $3Fxx instead of intercepting writes to $2006)
edit: fix minor brainos: 2C07 doesn't have missing pixel; "right 8 scanlines", wat?


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PostPosted: Tue Jun 04, 2013 5:51 pm 
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If you add any extras, it's no longer a NES. Except for the masking ones and other view-only effects, those seem okay.

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PostPosted: Tue Jun 04, 2013 6:39 pm 
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These are view-only: writeable palette; blank top, bottom, and right side without affecting sprite 0; upscaling; change blanking color.

This can be done by postprocessing the crystal, and it won't be program-visible if fed to both the CPU and PPU clock inputs: Skip one period of the CLK input by one master clock at the start of each scanline and by four master clocks near the start of every second line 0. This would cause M2 to deviate slightly from 1.79 MHz, confusing some reset detection circuits, so space the skipped periods a bit apart throughout the first line.

These can in theory be implemented on a Game Pak that intercepts the entire CPU and PPU bus: dual-ported VRAM (already present in MMC5 ExRAM); steering of $4014 DMA to VRAM.

Only one is impossible on an NES and affects program-visible behavior: swap 2000/2001.


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PostPosted: Tue Jun 04, 2013 8:10 pm 
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Dwedit wrote:
If you add any extras, it's no longer a NES. Except for the masking ones and other view-only effects, those seem okay.
The point is, you're already adding new hardware. As long as the incompatibilities won't be accidentally triggered, who cares? That's the entire point behind adding the signature. Code can detect what's available and use it if it wants. I admit the second list is fairly pipedreamy, but the only one in the first list that's not largely invisible or usable for Vs. System compatibility is hijacking DMA.

A nice addition—although I'm not altogether certain how to do it—would be a modification to the PAL NES to act more like a Dendy. (Fixing the 2A07's ÷16 is doable, but awkward, once you can inject a different clock frequency. Use an extra crystal or a PLL to make a CPU clock of ~28.4MHz. There's also the problem where vblank doesn't apparently last the whole 70 lines)

Most other things are either view-only (clipping) or for 2C04 and 2C05 support (missing pixel, rewriteable palette). Having that means the PowerPak can now play Vs. System games without any modification (modulo some of the dip switches necessarily reading back as 0; fixing that would require hardware on the expansion port).

Tepples has covered everything well, too.


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