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PostPosted: Mon Dec 03, 2012 6:39 pm 
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The only important question is "what's being used for an ADC"? Doesn't seem like anything is... So is it really a partial-PPU emulator that snoops bus activity?


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PostPosted: Mon Dec 03, 2012 7:20 pm 
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12×, and you basically can't buy one. (digikey sells only an oscillator, no crystals at that frequency, and so you can't use them in a PLL)

The next most robust design is one that samples at roughly 3×12×colorburst, and now you need to run all your components at ~150MHz instead.

kyuusaku wrote:
The only important question is "what's being used for an ADC"? Doesn't seem like anything is... So is it really a partial-PPU emulator that snoops bus activity?
While the EP2C35 does not have an ADC, the DE2 does: ftp://ftp.altera.com/up/pub/Webdocs/DE2_UserManual.pdf Specifically the ADV7181B. And I'm sure thefox would have told us if he were emulating a PPU here; that's been done before and is not really novel any more.


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PostPosted: Mon Dec 03, 2012 7:47 pm 
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While the DE2 has the TV decoder, it doesn't appear he is using it... And if he were, it can't be used as a GP ADC since it appears wired solely for composite/directly spits out YUV-decoded pixels at some 13.5 MHz derivative of course. I believe the pin headers are strictly GPIO too.


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PostPosted: Mon Dec 03, 2012 7:54 pm 
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Is there a reason why 6x wouldn't work if samples are taken on both rising and falling edges?


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PostPosted: Mon Dec 03, 2012 7:59 pm 
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tepples wrote:
Is there a reason why 6x wouldn't work if samples are taken on both rising and falling edges?
No ADC is double-clocked like that? You still need a PLL somewhere. I guess you could start with the actually-purchasable 4x crystal and use a 3x PLL in that case.


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PostPosted: Mon Dec 03, 2012 8:08 pm 
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3 x 12 x subcarrier is probably quoted for asynchronous sampling, since 3x Fs can easily recover Fs unlike 2x Fs.

6x is OK if you're synchronized, and have two sample & hold circuits or two ADC, or an ADC with a built in PLL (video ADC often double 27 MHz to 54).


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PostPosted: Mon Dec 03, 2012 8:42 pm 
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lidnariq wrote:
kyuusaku wrote:
The only important question is "what's being used for an ADC"? Doesn't seem like anything is... So is it really a partial-PPU emulator that snoops bus activity?
While the EP2C35 does not have an ADC, the DE2 does: ftp://ftp.altera.com/up/pub/Webdocs/DE2_UserManual.pdf Specifically the ADV7181B. And I'm sure thefox would have told us if he were emulating a PPU here; that's been done before and is not really novel any more.

Since there are only a few levels, perhaps you could have a comparator for each.


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PostPosted: Mon Dec 03, 2012 9:39 pm 
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Somehow I missed this post...
kyuusaku wrote:
And if he were, it can't be used as a GP ADC since it appears wired solely for composite/directly spits out YUV-decoded pixels at some 13.5 MHz derivative of course.
I first was afraid of that too, but looking at Analog's application notes they specify how to use it to sample high resolution RGBHV inputs too. (AN-0978)
kyuusaku wrote:
While the DE2 has the TV decoder, it doesn't appear he is using it... [...] I believe the pin headers are strictly GPIO too.
Now that's an actual problem :)
blargg wrote:
Since there are only a few levels, perhaps you could have a comparator for each.
A 4 bit uniform ADC, or ~3.5 bit nonuniform ADC is good enough, with the following groupings:
Code:
sync
Colorburst low, 0D attenuated
0D, 1D attenuated
1D, xE, xF, blank, black
2D attenuated
00 attenuated
Colorburst high, 2D
00, 10 attenuated, 3D attenuated
20 attenuated, 30 attenuated, 10
3D
20, 30


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PostPosted: Mon Dec 03, 2012 10:29 pm 
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It'd be far too obnoxious to recover the level with a 4-bit ADC since you'd need equipment and skills to develop a preprocessing circuit for level shifting and biasing. Instead you could stick a very typical 8-bit ADC between VDD & VSS and maybe have enough resolution, or definitely have enough with a simple resistive VDD/2 bias, since the DAC should swing 0.7V somewhere around VSS.

For a really low cost, high speed ADC you could probably bias the CMOS inputs (or better yet differential inputs) to act as comparators, but that would take quite a bit of wizardry...


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PostPosted: Tue Dec 04, 2012 1:52 am 
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kyuusaku wrote:
It'd be far too obnoxious to recover the level with a 4-bit ADC since you'd need equipment and skills to develop a preprocessing circuit for level shifting and biasing.
<blink blink blink> There's nothing hard, other than maybe that 4-bit ADCs don't exist. But an array of 15 trimpots and 15 comparators is awfully hard to screw up.


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PostPosted: Tue Dec 04, 2012 2:16 am 
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Yeah no, I'm not using ADC, and I'm pretty sure it's wired up in such a way in DE2 that it can only be used for decoding composite video. And I'm not using any PLL either, the PLL of the FPGA can only be used with specific clock pins, none of which the GPIO ports are connected to (there is an external clock input on the board, but...)

I'm using the EXT-pins of PPU. The only "emulated" part is the capturing of the PPU palette writes.

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PostPosted: Tue Dec 04, 2012 7:54 am 
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lidnariq wrote:
How many blocks does your design take?

Blocks of memory or logic elements? The global palette lookup is 512 * 24 bits (but could be reduced by using less bits for RGB and calculating the emphasis dynamically). Shadow palette is about 16 * 6 bits and scanline buffers are 512 * 9 bits each (extra space is for borders, could be optimized). Logic utilization is at about 1% if I remember correctly, there's not a lot of it.

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PostPosted: Tue Dec 04, 2012 9:56 am 
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thefox wrote:
I'm using the EXT-pins of PPU. The only "emulated" part is the capturing of the PPU palette writes.

But HOW?! (C) Moss / The IT Crowd
Didn't EXT output displays only part of the information? Should be 5 bit color (4 bits of background and 4 bits of sprite), while the width of the EXT only 4 bits.
Image
And EXT shuold be enabled as output by writing to PPU control register, isn't it?


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PostPosted: Tue Dec 04, 2012 11:12 am 
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I hope this means someone out there now will look into making a separate board for RGB output now. That would be awesome.


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PostPosted: Tue Dec 04, 2012 3:43 pm 
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All around the globe, the remaining thousand or so VS. Duck Hunt arcade board are breathing a sigh of relief knowing that their PPU won't be violently extracted anymore :lol:


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