Understanding the behavior PPU

Discuss emulation of the Nintendo Entertainment System and Famicom.

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mrhyde
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Understanding the behavior PPU

Post by mrhyde »

Hi guys,

I'm currently writing an emulator for the NES. Yes, I know. There is this "information" and I read it. But I don't develop the emulator for "other", I'm doing this for me to better understand how those devices work and to have fun. Anyway: currently I have finished the CPU, memory management and the controller input and I've started with the PPU, the challenging part for me. Everything which is related to the memory mangement inside the PPU (DMA, VRAM etc.) is trivial for me. I've a problem understanding how the frames are "rendered".

In order to get started with the PPU I read this nice document. But it doesn't really tell me how the rendering process of one frame actually works. I also looked into some documents from here. But nowhere is the conceptual advance of the PPU described.

So could you please give me an overview of rendering one frame? Or what steps I need to perform to get a frame rendered?

I could look into any existing code, but this tells me not the general "roadmap" but rather many technical details I don't want to know at this time.

Greetings,
mrhyde
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Bregalad
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Re: Understanding the behavior PPU

Post by Bregalad »

You should read this one carefully :
http://nesdev.com/2C02%20technical%20reference.TXT
lidnariq
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Re: Understanding the behavior PPU

Post by lidnariq »

The NES PPU is nothing but niggling technical details.

Are you familiar with the wiki? If not, try looking here and read the pages linked from it.

Or maybe try reading all of this, this, or this thread.
mrhyde
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Re: Understanding the behavior PPU

Post by mrhyde »

Hi,
lidnariq wrote:The NES PPU is nothing but niggling technical details.
yes. But I need a general overview how the rendering takes place. I know about the pattern tables and name tables and that they are painted during the scanlines line per line. But I need to know how the PPU generally behaves.

I hoped that someone here told me this. Then I know how it goes. The details aren't the problem. They are written down on various tutorials like the one you posted. But I need to know how the general process works. That's my problem. Could one understand this?

I'll look at all the links and come back later ...
lidnariq wrote:Or maybe try reading all of this, this, or this thread.
Oh, there are other people with exactly the same problems :roll:

EDIT: by the way: are the output dimensions 256 px (width) by 240 px (height). This would make extremly more sense as 240 px (width) by 256 px (height) which I read in a document around the net.

Greetings,
mrhyde
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blargg
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Re: Understanding the behavior PPU

Post by blargg »

What something does versus how it achieves it. The former is important prior to mentally assimilating the latter, sometimes at increasing levels of detail. It's like trying to understand source code without a clear idea of the overall architecture. That's what I understand you to be saying, and maybe the links answer some of it. It wouldn't surprise me of they don't, as once one has an overview, one doesn't forget so doesn't need to document, while the details are easily forgotten and written down.
mrhyde
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Re: Understanding the behavior PPU

Post by mrhyde »

Hello,
blargg wrote:[...] without a clear idea of the overall architecture. That's what I understand you to be saying, and maybe the links answer some of it.
thats what I'm talking about.

Anyway I decided to start with some topic in the hope that I'll end with a working PPU. So I got my hands on the pattern tables and build a little debug output. Fine. Now I'm trying to get something out of the name and attribute tables and encountered a question:

I might not read carefully enough but everywhere stands that the 960 name table bytes "fill" the entire screen with tiles and every byte refers to an index in the pattern table. This makes sense. But nowhere stands how this works. With a byte I can only address up to 256 pattern table indicies. But both pattern tables together have 512 indices to address. So what is my misunderstanding?

And a second question: there is only one collision detection only with sprite 0 (e.g. the sprite located at index 0 in SPR RAM)? Right?

Greetings,
mrhyde
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Bregalad
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Re: Understanding the behavior PPU

Post by Bregalad »

So what is my misunderstanding?
You should first of all have a careful look at the PPU registers and how they function.
This is normally the first thing you'd do when trying to understand the PPU (at least that the first thing I've done 10 years ago).

Then it's also important to understand the state machine for scanlines (and memory fetches), hblanks and vblank, which is explained both in a global viewpoint and in detail in the doccument I've linked to.
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tokumaru
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Re: Understanding the behavior PPU

Post by tokumaru »

Real basic explanation quoted from myself (from this post):
tokumaru wrote:The PPU, just like the CPU, is constantly running, but instead of fetching and executing instructions it repeats the process of generating a video signal, which consists of: 20 scanlines of VBlank (70 for PAL), 1 pre-render scanline, 240 scanlines of picture, and finally, 1 dummy scanline (51 for Dendy). You just repeat this over and over, modifying the rendering parameters as the registers are written to.
The PPU runs alongside the CPU, doing its own thing, which is rendering picture frames over and over based on the contents of VRAM/ROM and the values of its internal registers. For details of what happens when, check the wiki. Then read about the registers and how they affect the PPU.
mrhyde
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Re: Understanding the behavior PPU

Post by mrhyde »

Hi,
tokumaru wrote:For details of what happens when, check the wiki.
that's the page I'm looking for. Thank you.

Could you give me a hint concerning my "nametable addressing" confusion?

EDIT: I found this document which explicitly says:
The first area of PPU memory is known as the "Pattern Tables." The
pattern tables are 8kb in size, which is usually split in half, one part
for the background, the other for sprites.
PPU Control register 1 (PPUCTRL0):
* Selects the Name table to display
So I will interpret this as: one toggle in PPUCTRL0 selects one of the pattern tables as active; only tiles from one of this pattern table can be displayed the same time. Right?

Greetings,
mrhyde
WedNESday
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Re: Understanding the behavior PPU

Post by WedNESday »

PPU Memory

0000 - 1FFF

These are where the Pattern Tables are stored. Normally 0000-0FFF are where the background tiles are and 1000 - 1FFF are where the sprite tiles are.
Please note that this memory does not exist on the NES but it merely what is on the cartridge itself (it basically points to it).

2000 - 2FFF

These are where the Name Tables are. The Name Tables are what is displayed on the screen. The numbers contained inside of them are what tiles from the background Pattern Table must be drawn.

2000 - 23BF Name Table 0
23C0 - 23FF Attribute Table 0

...and repeat 3 times for the other 3 adding 0400 each time.

So the NES can only fetch background tiles for the Name Tables from 1 half of 0000 - 1FFF at any one time (the same goes for sprites too). Of course the programmer is free to switch any time he likes.
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Re: Understanding the behavior PPU

Post by tepples »

mrhyde wrote:So I will interpret this as: one toggle in PPUCTRL0 selects one of the pattern tables as active; only tiles from one of this pattern table can be displayed the same time. Right?
Correct. At any time, the background uses one bank (tiles 0-255 at $0000 or tiles 256-511 at $1000) depending on that flag. Depending on other bits written to the same port, sprites can use the same bank, use the other bank, or use 8x16 pixel sprites from both banks.
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thefox
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Re: Understanding the behavior PPU

Post by thefox »

WedNESday wrote:So the NES can only fetch background tiles for the Name Tables from 1 half of 0000 - 1FFF at any one time (the same goes for sprites too).
This sentence is ambiguous so could be interpreted in a lot of different ways, but it's probably worth mentioning that 8x16 sprites can use tiles from both pattern tables within a single frame, without switching with registers.
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Re: Understanding the behavior PPU

Post by WedNESday »

thefox wrote:
WedNESday wrote:So the NES can only fetch background tiles for the Name Tables from 1 half of 0000 - 1FFF at any one time (the same goes for sprites too).
This sentence is ambiguous so could be interpreted in a lot of different ways, but it's probably worth mentioning that 8x16 sprites can use tiles from both pattern tables within a single frame, without switching with registers.
Ambiguous how? (I didn't mention 8x16 sprites as I didn't want to confuse him)
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thefox
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Re: Understanding the behavior PPU

Post by thefox »

WedNESday wrote:
thefox wrote:
WedNESday wrote:So the NES can only fetch background tiles for the Name Tables from 1 half of 0000 - 1FFF at any one time (the same goes for sprites too).
This sentence is ambiguous so could be interpreted in a lot of different ways, but it's probably worth mentioning that 8x16 sprites can use tiles from both pattern tables within a single frame, without switching with registers.
Ambiguous how? (I didn't mention 8x16 sprites as I didn't want to confuse him)
I can't remember what I meant anymore (damn lack of sleep...), but it probably was about how "at any one time" is defined.
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Re: Understanding the behavior PPU

Post by WedNESday »

Not that I'm offended, but how does 'at any one time' pose a problem? :)
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