I'm currently implementing an MMC5 mapper for my emulator.
According to the specs, the high bit (bit 7) in the MMC5 bank switching registers PRG Bank 0, 1 and 2 ($5114, $5115, $5116) control the ROM/RAM mode of these banks.
By question is: when a bank is set to ROM mode (read only), what should happen if an attempt is made to write to the ROM?
MMC5 RAM / ROM read only toggle
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- colinvella
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MMC5 RAM / ROM read only toggle
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Re: MMC5 RAM / ROM read only toggle
Nothing, of course.colinvella wrote:when a bank is set to ROM mode (read only), what should happen if an attempt is made to write to the ROM?
Quietust, QMT Productions
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- colinvella
- Posts: 74
- Joined: Sun Jun 05, 2016 1:41 pm
Re: MMC5 RAM / ROM read only toggle
Thanks!Quietust wrote:Nothing, of course.
Just as a clarification summary, concerning ROM/RAM banks:
When reading, the corresponding ROM/RAM mode determines whether to read from ROM or RAM (using the bank switching logic based on the PRG bank mode and corresponding bank register)
When writing, ROM mode does nothing, while RAM mode writes into RAM (again using the bank switching logic as for reading)
Is my understanding correct?
Also, what is the exact role of Protect 1 and 2. Do these prevent writing to RAM banks and RAM/ROM banks in RAM mode? Should such writes be ignored when both Protect 1 and Protect 2 are set ?
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Re: MMC5 RAM / ROM read only toggle
Perhaps "of course" wasn't so clear in the era of in-circuit reprogramming of flash memory.Quietust wrote:Nothing, of course.colinvella wrote:what should happen if an attempt is made to write to the ROM?