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PostPosted: Tue Sep 06, 2016 5:42 pm 
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Over the Labor Day weekend, I decided I wanted to convert some of my favorite NES games to the VS system. So like any other self-respecting nerd, I downloaded the Balloon Fight (USA) NES ROM, stripped the NES header off of it, split it into the PRG and CHR ROMs, burned them onto (3) 2764 chips, installed them in my red tent with a 2C03 PPU, and voila! I'm playing Balloon Fight. Players 1 and 2 are swapped, and I have to press 3P for Start, but I can play the 1P game as long as I want -- but if I play 2P Battle Mode, the ROM resets after one of the player dies (or at least I think that's the pattern).

So here is the burning question:

Quote:
Does anyone know of a specific reason why the reset would happen during a 2-player game? I know the registers are swapped for player controls from the NES, but would this have anything to do with something I read elsewhere on this board about needing to read from $4017 (I think that was the location) at least once every second?


Or, if nobody knows the reason why it would happen, can anyone suggest a good investigative tactic to pinpoint the issue? I've considered bundling the ROMs up into a .ZIP and trying to debug the behavior with an emulator, but I'm not sure if the emulators out there would definitely reproduce the issue, so tips on doing that would be appreciated as well.

I'm not above modifying the ROM, if I can pinpoint with a debugger what code causes the issue.

The Why:

So Balloon Fight is a readily available game for the VS system, so why would I bother? Well, it's a 12-ROM game that requires using both sides of the red tent, with the only payoff being that each player can have their own screen. In my opinion, that's a serious design flaw and makes owning Balloon Fight on the red tent a tragedy, as it leaves the other side unavailable for something that 2 other people could be playing.

Pic of title screen

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PostPosted: Tue Sep 06, 2016 5:50 pm 
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lupin3rd wrote:
if I play 2P Battle Mode, the ROM resets after one of the player dies (or at least I think that's the pattern).
After either player dies? Or is it always after player 2 (i.e. what the Vs. System calls player 1) dies?

Quote:
I read elsewhere on this board about needing to read from $4017 (I think that was the location) at least once every second?
That's my best guess.

I assume the ROMs were in the "slave" slot ?


You should be able to get away with putting the NES Balloon Fight ROMs in the "master" slot and some actually-intended-for-the-Vs-System game into the "slave" slot, since the watchdog only cares about the slave CPU.


Quote:
trying to debug the behavior with an emulator, but I'm not sure if the emulators out there would definitely reproduce the issue, so tips on doing that would be appreciated as well.
Unfortunately, I don't think any emulators implement the watchdog timer.

However, you should be able to use any ordinary emulator-with-debugger to check if the game stopped reading from $4017 after the relevant player died.

Quote:
So Balloon Fight is a readily available game for the VS system, so why would I bother?
I suppose you don't mind the game not requiring credits either?


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PostPosted: Tue Sep 06, 2016 6:11 pm 
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Quote:
I assume the ROMs were in the "slave" slot ?

Actually, they were on the slave side of the board... Hmm... (Runs out to garage to try swapping sides)

HOLY COW. That worked! Any idea what the technical reason is behind it? I'm just wondering if there's any type of modification I could do to the ROM image to keep that from happening if I wanted to run a different NES game on the slave side...

Quote:
I suppose you don't mind the game not requiring credits either?

Nope, not at all. This is purely a convenience for myself, friends, and family. :) Hey, I really appreciate that suggestion about trying it out on the master side!

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PostPosted: Tue Sep 06, 2016 6:30 pm 
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First thing to try is BIT $4017 somewhere in the NMI handler. It might be tough if Balloon Fight is tightly packed though.


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PostPosted: Tue Sep 06, 2016 6:50 pm 
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So, yeah, it worked because the watchdog timer only watches the "slave" CPU, and not the "master" CPU.

Theoretically, the game in the "slave" slot should make sure that the "master" CPU hasn't crashed (by making sure that the "master" CPU gives RAM / asserts IRQ on the slave occasionally) and intentionally fail the watchdog if so. But I can't imagine any games actually do that, other than the explicitly two-screen games.


It shouldn't be too hard to inject the necessary extra reads from $4017 in an Not-for-Vs-System game; it's very rudimentary ROM hacking, but specifics really want a bit of comfort with 6502 assembly.


On an entirely unrelated note, would you be willing to run the Vs. System characterization ROM I wrote? We do already have data from Memblers's Vs. System, but it'd be nice to get a second data point at all.


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PostPosted: Tue Sep 06, 2016 8:36 pm 
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Quote:
On an entirely unrelated note, would you be willing to run the Vs. System characterization ROM I wrote? We do already have data from Memblers's Vs. System, but it'd be nice to get a second data point at all.

Hey, that sounds like fun! I read the whole thread you linked me to, but I'm not sure what objectives we're testing here.

I have several revisions of the VS board, but I think only 2 of them are currently working correctly. That may help identify any potential issues as well. I downloaded the file and extracted it, but I might need a little more information about what's going on in there. (Didn't see a README file in the archive)

Just throw me a hint about what to do with the files. Am I just using my own copy of SMB ROMs, and then burning and subbing in the CHR file in this archive? You can PM me if you want to take the conversation out of this thread, but I'm turning in for tonight.

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PostPosted: Tue Sep 06, 2016 8:54 pm 
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If you already have a Vs. SMB ROM set around, you can just use its CHR (i.e. use it for ROM 2A or 8A).

If you don't have a Vs. SMB, then ... uh. The contents of the 768-byte CHR file are the minimal font-only copyright-not-infringing subset of the SMB CHR, and you could either program it in a 4 KiB ROM ... or just extract the CHR from the bundled NES ROM and program that into a 8 KiB ROM. Or I could quickly spin up another build for whatever CHR you already have programmed (just tell me what game)

Program the "e000.bin" file and run it in 1A or 6A.

The tests worth repeating are:
• "watchdog timeout" (only when running from "slave" CPU; this test should fail when running on the "master" CPU)
• "coindrop duration" (both CPUs)
• "coin counter speed" (both CPUs)
and, because I added this after Membler's test, the "2002 readback" and "dipswitches" values at the bottom of the main screen


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PostPosted: Wed Sep 07, 2016 8:29 am 
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lidnariq wrote:
If you already have a Vs. SMB ROM set around, you can just use its CHR (i.e. use it for ROM 2A or 8A).

Yeah, I probably have 2 sets, so no worries there. Sounds easy enough. So am I understanding correctly, that this is basically a tool to test/time some behavior on the hardware? Is there any reason to run the tests on both sides, or does it really only make sense to run it on one side? If that's the case, should it be the master or slave side?

My apologies for all the questions, but I'm a bit of a stranger on this forum, so I don't have a lot of knowledge about everyone's projects or really any context about what's happening around here. :) I am super stoked to help out with this testing, though. I think I'm using the MDS-04-CPU board, but I think I also have an -05 and an -02, just not sure which ones are working currently. Results may vary slightly on the revisions I'm sure.

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PostPosted: Wed Sep 07, 2016 11:53 am 
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lupin3rd wrote:
this is basically a tool to test/time some behavior on the hardware?
By now, yes. The other lines in the test framework were originally verifying some weirder things that I wasn't certain about from the schematic.
Quote:
Is there any reason to run the tests on both sides, or does it really only make sense to run it on one side? If that's the case, should it be the master or slave side?
Slave side is necessary to test the watchdog timeout; testing the other properties on the master side would just get another round of duplication.

All the coin counter and coin drop tests are actually testing properties of the cabinet... but since the Vs. System isn't JAMMA that's still related.


One (minor) reason to test on both sides is that I very recently just noticed that there's theoretically one bit (in the "dipswitches" value) that should differ when running on the "master" and "slave" sides, and verification would be nice.

Quote:
My apologies for all the questions
Perfectly fine!
Quote:
Results may vary slightly on the revisions I'm sure.
AFAIK, the "dipswitches" value and the watchdog timeout are the only places I'd expect variation across mainboard versions.


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PostPosted: Thu Sep 08, 2016 5:33 pm 
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Here's the results of my tests. I'm not sure if I was comprehensive enough, or if my captions to these photos make sense. Ultimately, we ran the tests on the Slave side first, and then the master side. The only weird anomalies were that none of the coin counter operations worked as expected, we never even saw the counter move; also, the test suite wouldn't run if switch 8 on bank 1 was in the off position.

Album of test results

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PostPosted: Thu Sep 08, 2016 6:24 pm 
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I think that covered everything? Thank you! It's good to know that your machine's coin drops are a little faster than Memblers's.

That DIP switch behavior ... The characterization ROM doesn't do anything with the DIP switches except print the value to the screen there. The number in that last photo only indicates all DIP switches are ON... could something else be wrong?

Also, in what order do the pictures of the slave side DIPs go? Is that https://i.imgur.com/eEvZjPV.jpghttps://i.imgur.com/33LEHbm.jpg and https://i.imgur.com/mDWg5AR.jpghttps://i.imgur.com/mDWg5AR.jpg ... or vice versa?


I have to admit I'm confused about the coin counter. I'm certain I didn't change any of that from the previous version I'd asked Memblers to run. (I assume it worked on the games you had?)

Transcribing contents of photos:
• Slave Side: 2002 READBACK IS 00 1F / DIPSWITCHES ARE 80 00 / RP2C04-0004
• Slave Side: Watchdog 043227 [ ≈ 1.24s ]
• Slave Side: Coin Drop 1E6E 1A64 [ ≈ 48.3ms 41.9ms ]
• Slave Side: Shared memory test [ RAM always enabled as expected ]
• Dips Both Banks Off
• Slave Side Dips: $98 $FC [ when a DIP switch is "on" it shorts the pin to ground, corresponding to logic 1 thanks to 74LS240 ]
• Dips All On
• Master Side: Watchdog did not occur [as expected]
• Master Side: Shared memory test: as expected ($4016.1 clear disables master's access to RAM; $4016.1 set enables it; there's 2 KiB of it and it's mirrored in a 8KiB window)
• Master: Dips all off except bank 1, switch 8: Test PRG wouldn't boot without it set
• Master Dips: 18 FC / RC2C03


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PostPosted: Thu Sep 08, 2016 6:49 pm 
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Okay, so maybe a little clarification is in order. The test ran fine on the slave side regardless of dip switch status. It was only after moving to the master side that it suddenly took issue with switch 8 in bank 1. Disclaimer: I was lazy, so I left my quirky NES Balloon Fight in the system (but on the slave side) during the characterization test on the Master side. In hindsight, this was probably a bad idea.

Question: There are 2 different types of CPUs in my collection of VS hardware. A 2A03 and 2A04. My understanding is that the 2A04 is for use on the master side, when only one game is installed on the board (in the slave side). So is this a dummy CPU? For my tests, I had a 2A03 on both sides... should I have had a 2A04 on the master side?

I can run more tests for you, if you like. I'm not above shooting video either, so the order of steps and results makes more sense. I had not tried dropping coins into my machine since I had owned it, and the coin mechs were slightly bent. I couldn't even run the test because the switches would get stuck in the closed position. After fixing the bends, the switches would spring back correctly.

My friend Brian came over, and he's been hanging around reading this page and its contents for the last 10 years or more -- he was stoked to help too. If you add new tests or want me to try running it on my other working board, I can do that too. Also, if you prefer that I run a real VS game on the opposite side (or no game), then I can oblige those requests as well. :)

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PostPosted: Thu Sep 08, 2016 7:19 pm 
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2A04 just allows the other side to take control of the shared RAM, I think. That's why you can't run two Vs. SMB: it needs the RAM to cache things, probably level data or something read out of CHR ROM.


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PostPosted: Thu Sep 08, 2016 8:02 pm 
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lupin3rd wrote:
It was only after moving to the master side that it suddenly took issue with switch 8 in bank 1.
To make sure I understand: DIP switch bank 1 is the bank for the master CPU, and DIP switch bank 2 is for the slave CPU?

So theoretically, whatever is in the master CPU shouldn't be able to care about what's going on in bank 2, and vice versa?

What's confusing me is the bit where your picture in the album ( https://imgur.com/KlZBirb ) shows DIP switches 1-7 as OFF, but the value on-screen ( https://imgur.com/V45mBgb ) shows all DIP switches as ON. Hence asking about temporal order. And also asking if anything's seemed suspicious when games are run on the master side of this specific board.

Quote:
I left my quirky NES Balloon Fight in the system (but on the slave side) during the characterization test on the Master side.
I would have assumed that would have caused the system to reboot every... oh, right, it only fails the watchdog after a 2 player game when the first player dies. Right. Ok. No, I don't think that should change things.

Quote:
My understanding is that the 2A04 is for use on the master side, when only one game is installed on the board (in the slave side). So is this a dummy CPU?
As far as we know, the 2A04 is "just" a jumper between pin 20 and pin 38, causing the shared RAM to always be granted to the "slave" CPU. (For example, Vs. SMB relies on having access to that extra 2 KiB of RAM, but its documentation also says several other games—but not all—are sufficiently equivalent to the 2A04)

If you're willing to sit down with a multimeter and see if that is true, that would be helpful! (And maybe see if any other pins are shorted, too?)

Quote:
I can run more tests for you, if you like. I'm not above shooting video either, so the order of steps and results makes more sense. I had not tried dropping coins into my machine since I had owned it, and the coin mechs were slightly bent. I couldn't even run the test because the switches would get stuck in the closed position. After fixing the bends, the switches would spring back correctly.
Well, thefox wrote this test that detects the not-missing PPU pixel on the 2C03. I guess it would be nice to verify the same is true on the 2C04... except that it's no longer accessible :(

There's a few other things mentioned on the wiki here that we don't know, but determining them might require writing some more tests. (And possibly adjusting the CRT image position, but we'll try to work around that)

If we do write some tests, do you have any of the Vs. System daughtercards that add a more complicated memory manager hardware (e.g. 108 or VRC or MMC1)? And/or have you modified your mainboard to support Vs. Gumshoe?

[From other thread] Oh, you have the UNROM daughterboard. Could you try tepples's test suite? A lot of the tests won't be relevant on a SD CRT, or sensible on a RGB PPU, but a few (like the "overscan" test) would be nice to have data from.


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PostPosted: Thu Sep 08, 2016 9:44 pm 
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lidnariq wrote:
Well, thefox wrote this test that detects the not-missing PPU pixel on the 2C03. I guess it would be nice to verify the same is true on the 2C04... except that it's no longer accessible :(

I can rehost the test, but I guess it would be better if somebody rewrote it altogether to be more robust and to provide a non-boolean result. :) I guess it might work best if it tracked the number of VBLs with NMI during the delay loop, and also measured the time to the last VBL after the delay loop exits.

(Or maybe that nocash test that he posted further down is sufficient, I'm not exactly sure what it's measuring.)

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