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PostPosted: Sun Oct 02, 2016 1:23 pm 
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Something that sounds really counterintuitive to me is the following scenario:

Consider PPU RAM: [0x2F00] 12 34 00 00 00 ...

Now loot at log:

E066 AD 07 20 LDA $2007 = FF A:00 X:00 Y:00 P:27 SP:FA CYC:307 SL:241 VRAM ADDR: 0x2F00
E069 AD 07 20 LDA $2007 = FF A:00 X:00 Y:00 P:27 SP:FA CYC:319 SL:241 VRAM ADDR: 0x2F01
E06C C9 34 CMP #$34 A:12 X:00 Y:00 P:25 SP:FA CYC:331 SL:241 VRAM ADDR: 0x2F02

What I expect imediatelly after the first LDA is: A = 12; then after the second LDA: A = 34. But it's completely weird to me :)

In my mind; It should works in this way:

E066 AD 07 20 LDA $2007 = FF A:00 X:00 Y:00 P:27 SP:FA CYC:307 SL:241 VRAM ADDR: 0x2F00
E069 AD 07 20 LDA $2007 = FF A:12 X:00 Y:00 P:27 SP:FA CYC:319 SL:241 VRAM ADDR: 0x2F01
E06C C9 34 CMP #$34 A:34 X:00 Y:00 P:25 SP:FA CYC:331 SL:241 VRAM ADDR: 0x2F02

Can you gimme a tip how understand this behavior? I already read Nesdev Wiki about VRAMADRESS and PPUDATA registers, but I can't understand what could be the reason for this behavior.

Thank you.


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PostPosted: Sun Oct 02, 2016 1:50 pm 
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Reads from PPU external memory (e.g. nametables) cannot be fulfilled in time for the CPU. So the CPU requests a read, gets the result of the previous read, and the PPU then asynchronously fetches the next byte.


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PostPosted: Sun Oct 02, 2016 2:10 pm 
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Wow, Thank you!

Just one more question; If I got it; if we have more two LDA 2007 in sample;

PPU RAM 0x0000 = FF

E066 AD 07 20 LDA $2007 = FF A:00 X:00 Y:00 P:27 SP:FA CYC:307 SL:241 VRAM ADDR: 0x2F00
E069 AD 07 20 LDA $2007 = FF A:00 X:00 Y:00 P:27 SP:FA CYC:319 SL:241 VRAM ADDR: 0x2F01
E06C C9 34 CMP #$34 A:12 X:00 Y:00 P:25 SP:FA CYC:331 SL:241 VRAM ADDR: 0x2F02
...
E080 AD 07 20 LDA $2007 = FF A:34 X:00 Y:00 P:27 SP:FA CYC:307 SL:241 VRAM ADDR: 0x0000
E082 AD 07 20 LDA $2007 = FF A:FF X:00 Y:00 P:27 SP:FA CYC:307 SL:241 VRAM ADDR: 0x0001

LDA 2007 (when VRAM ADDRESS is 0x0000 A = 34
LDA 2007 (when VRAM ADDRESS is 0x0001 A = FF

Thus, aways there is a delay of one access request? Right? So, what is the first result of a LDA 2007 (when there is no previous read)? Zero?

thx!


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PostPosted: Sun Oct 02, 2016 2:33 pm 
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Reads from $2007 always start the process by which the PPU fetches the next byte from external memory.

In the specific case of the subset of PPUs that support reading back palette memory (which is not all of them!), a read from $2007 when the address in $2006 is (0x3F00 through 0x3FFF) will return the value from palette memory, instead of the contents of the latch.

This means that a sequence like

lda #$3F
sta $2006
lda #$ff
sta $2006
lda $2007
ldx $2007
A will contain the contents of the palette entry at # 0x1F (because of mirroring), but X will contains the contents of the nametable memory lying underneath the palette memory (at 0x3FFF)

The PPU explicitly clears (sets to 0) the $2007 read buffer on power-up.


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PostPosted: Sun Oct 02, 2016 3:15 pm 
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zerojnt wrote:
So, what is the first result of a LDA 2007 (when there is no previous read)? Zero?

It depends on whether the PPU initializes that buffer with anything during its power up sequence, buy I don't see why they'd waste resources on something like that.


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PostPosted: Sun Oct 02, 2016 4:52 pm 
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tokumaru wrote:
zerojnt wrote:
So, what is the first result of a LDA 2007 (when there is no previous read)? Zero?

It depends on whether the PPU initializes that buffer with anything during its power up sequence, buy I don't see why they'd waste resources on something like that.

The first $2007 read result will be $00, as documented.


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PostPosted: Sun Oct 02, 2016 5:13 pm 
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Cool, I didn't realize we had these power up values documented!


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PostPosted: Mon Oct 31, 2016 11:19 pm 
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koitsu wrote:
tokumaru wrote:
zerojnt wrote:
So, what is the first result of a LDA 2007 (when there is no previous read)? Zero?

It depends on whether the PPU initializes that buffer with anything during its power up sequence, buy I don't see why they'd waste resources on something like that.

The first $2007 read result will be $00, as documented.

PPU has the reset pin. But in FC/NES it doesn't used - always inactive. That's why PPU sets default state at power up and don't change after reset, which affects only on CPU. You can always check it: just hold reset button when PPU shows some picture. If raster dissapear - PPU reset pin is used, otherwise don't.

PS My PCB's use it.


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