Anyway, the correct place to put this code in FCEUX is as part of addrlatch.cpp. Perhaps:
Code: Select all
//-------------- NCN-82 -----------------------
static void NCN82Sync(void) {
setchr8(0);
if (latche & 2) {
setprg32(0x8000, latche >> 3);
} else {
setprg16(0x8000, latche >> 2);
setprg16(0xC000, latche >> 2);
}
setmirror((latche & 1) ^ 1);
}
void Mapper63_Init(CartInfo *info) {
Latch_Init(info, NCN82Sync, NULL,
0x0000, // initial value of latch
0x8000, 0xFFFF, // range of latch
0); // whether prg-ram provided
}
Plus a little help in ines.cpp.
FCEUX has no implementations of submappers yet; it looks like the Whatever_Init routine has to inspect the CartInfo structure to decide how to initialize the board.
FCEUX also doesn't seem to have any way to write-protect CHR-RAM either; the best it has is the
PPUCHRRAM 8-bit bitmask which specifies whether any given 1024 B CHR bank is writeable or not. It's not directly addressable; instead the
setchr8r(r,A,V) function consults the
CHRram array to determine whether any given IC is always RAM (and writeable) or always ROM. If this matters, we'll either have to add new "setchrNx" functions to support the abstraction or break the abstraction with something like this:
Code: Select all
if (CHRram[r] && (latche & 0x200)==0)
PPUCHRRAM = 255;
else
PPUCHRRAM = 0;
—
I see now that the $F01A and $F01B banking writes are slightly trollish. "04 SUPER MARIO" and "74 FANCY MARIO" are the same PRG and CHR, just with different nametable layout. I don't suppose flaviocaste remembers whether the last nine games on the cart were "real"?