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PPU Request
[CPU] -------------> [PPU]
Moderator: Moderators
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PPU Request
[CPU] -------------> [PPU]
So, I am wondering if when we run our PPU cycles after running the current CPU instructions in our execution loop, do we read the registers and perform the memory operations?Because the CPU and the PPU are on separate buses, neither has direct access to the other's memory. The CPU writes to VRAM through a pair of registers on the PPU. First it loads an address into PPUADDR, and then it writes repeatedly to PPUDATA to fill VRAM.
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executionLoop() {
executeCpuInstruction(); // potentially a PPU register access here.
executePpuCycles(); // do we handle the writes to VRAM here based off the registers?
}
Between CPU cycles 3 and 4, atleast 3 PPU cycles (3.2 on PAL, I think) have happened, so even if reads/writes to $2007 (for example) only happened on PPU clocks, it wouldn't matter to the cpu at all. What will matter is executing 3 PPU cycles for each of those cpu cycles, as the $2007 pointer (loopy_v? is there a better name?) would get incremented 3 times as the instruction does 3 accesses to the address.
Read-Modify-Write instructions (ASL, LSR, ROL, ROR, INC, DEC,
SLO, SRE, RLA, RRA, ISB, DCP)
# address R/W description
--- ------- --- ------------------------------------------
1 PC R fetch opcode, increment PC
2 PC R fetch address, increment PC
3 address R read from effective address
4 address W write the value back to effective address,
and do the operation on it
5 address W write the new value to effective address