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VRC1, Bisqwit's MMC4 subset (doesn't use tile switching), and NINA-001 seem to all be reasonable ways to get 4+4 CHR banking with PRG banking, for less overhead than MMC1.

Other than the complication of possibly needing to handle interrupting MMC1 writes, I'm not clear the extra 4×(4+2)=24 cycles per bankswitch is particularly worth caring about, though.

Depends on how often you switch banks. If you do it 20 times or more per frame, it really starts to add up! 20 x 24 = 480 cycles, which's 1.7% of the 240 scanlines of picture. And it should actually be a little slower than that, because if you switch banks in the NMI for playing music, for example, the bankswitching routine used in the main thread has to do some additional steps to verify whether it was interrupted.

Just wanted to say that this code was reduced by one more character:
that works with asm6 assembler. edit: fills a page of ROM with the low byte of the address. This helps implement tokumaru's idea (allows txy using ldy $8000, x and tyx using ldx $8000, y; takes an extra byte when compared with txa tay or tya tax, but tokumaru says his idea doesn't use the accumulator and that may result in saving space when not having to save and restore the accumulator; after rewriting the sections of code where this might be used, it is beneficial for me to use txa tay so haven't been able to use this yet) without using assembly instructions.

This is not true for our game. The end of my VBlank handler looked something like this: Now, after being blessed with fixing a lot of the problems we found, I turned on the music and the screen started being lowered two rows (16 bits) whenever draw_our_column was being called. And that reminded me of tepples' guidance, that t gets clobbered everytime $2006 and $2007 are written to and so I should be sure to write $2000 and $2005 afterwards to fix t (his post is linked to at top of page 91). After checking, it was clear that $2000 and $2005 were being written to, inside a scroll_screen, every frame $2006 and $2007 were being written to, somewhere inside update_vram, and so it seemed that jsr FamiToneUpdate was taking too long. So after finding this earlier advice from tokumaru also on page 43 I tried moving jsr FamiToneUpdate to a spot right after +end because it doesn't include PPU operations. The game works and the screens don't lower 16 pixels for instances after draw_our_column is called inside update_vram while the music is playing!!

edit: tokumaru, I understand now that there was a hidden reason behind your words that are quoted above... posted this to help others who read your quoted statement. I really respect you tokumaru; thank you so much for all of your fantastic help and ideas!

edit3: changed a "to" to "too" and changed text referring to page 92 to refer to page 91. Two mistakes corrected

Correcting myself: setting the scroll should be the last PPU-related thing in your vblank handler. And you must keep track of how much time your vblank handler takes, because the scroll has to be set before the vertical blank ends. After setting the scroll, you're free to do things that do not affect rendering, such as playing music, reading the controllers, and whatever else you need to do at 60/50Hz.

If you know what you're doing, you can do a number of PPU operations outside of vblank, but if you're not sure, it's better to ask.

^Thanks tokumaru!!

tokumaru, your page of low bytes of the address, it has helped me to save two cycles and a zero page variable!

in some code like this:

adc $8000, y takes 4 cycles and is 3 bytes big
adc ejectLRvalue took 3 cycles and was 2 bytes
but, being able to comment the sty ejectLRvalue saved 3 cycles and 2 bytes! So the code is the exact same size with the changes and it is 2 cycles faster! (it will never run both sides of the branch)

You know how branches start with the following address and then add the second byte to reach the address branched to? Like, the beq +zero will branch to 0C212 and so it takes the next address, 0C203, and adds 0F and reaches 0C212. Does jmp act the same way? No, I think, because why would the 6502 waste time thinking about the next address? Just set the PC to the address in bytes three and two. If so, then our game would be frustrated, haha , cause it wouldn't really jump anywhere.

But, the jmp, being 3 cycles, is faster than two nops, 4 cycles. For me, it is important that beq +zero not branch to a different page. And, if bytes are ever removed from before 0C1FC, the code would still work fine.

edit.

That's called relative addressing. Since most conditional jumps don't need to go very far, the 6502 was designed to make these jumps smaller and faster, by encoding the target address as an 8-bit displacement rather than a 16-bit absolute address. The downside of that is that when you do have to conditionally jump to an address that's far away, you have to branch (testing for the opposite condition) over a JMP instruction.


JMP uses absolute addressing, so the actual destination address is the instruction's operand.


People normally use macros to ensure that no unwanted page-crossing happens... In ca65 it's trivial to write a macro that checks whether a branch instruction's address is in the same page as its destination address, and throws an error/warning if it isn't.

I personally tend to put code with this kind of sensitive timing near the start of the bank, where it's easier to predict where things will end up, and there are less things changing and shifting addresses.

Relative and Absolute addressing... thank you tokumaru, I forgot about those terms. A macro that gives an error if the branch crosses a page? That's interesting; thanks for introducing me to that! The assembler always gives an error if the code before a .pad overflows the pad address... so that has been working well for me.

Branches used at the start of pages is a great idea, that's what I try to do too; this branch is in the middle of my main loop so it just needs to be moved to the next page. My knowledge of code that needs to have perfect timing is pretty vague. It really helps sometimes when branches are moved/changed to prevent page-crossings so all of my branches are imprisoned within their respective pages. After doing that for a while it's not hard, or painful, and just part of the journey.

Does that change from "envelopes" to "sequences" mean that shiru has added support, in famitone2, for using the "Duty / Noise" effect when "#" is 1? For me a sequence implies 2 or more; I'm hoping shiru thinks the same way.

I don't have famitone2 set up; I tried to set it up once, but failed to get it to act normally; have set up a new instrument in famitracker 0.4.6 and checked the box next to "Duty / Noise" so that the same notes following each other, when assigned different instruments, are recognizable; sounds pretty cool; hence my question.

edit: I guess the answer is no because the window is titled "sequence editor" and so I have a sequence of 1 and "Duty / Noise" sequences aren't supported.

I understand "sequence" and "envelope" in FamiTracker to refer to the same concept. FamiTone2 supports only sequences of length 1 in Instrument editor > Instrument settings > Duty / Noise > Sequence editor. Some other NES audio drivers, including some that can import from FamiTracker, do not have this limit.

^tepples, that's great news, THANK YOU SO MUCH! So, if "sequence" and "envelope" refer to the same concept in famitracker... does famitone support a "Duty / Noise" sequence of length 1 too? I'll try that tomorrow.

As far as I can tell, in both major versions, a "Duty / Noise" sequence has a maximum length 1. This means instruments' attacks are slightly less interesting than they'd otherwise be. You can't, say, make a piano patch that starts at duty 2 and switches to 1, or a brass patch that starts at 1 and switches to 0, or a hi-hat patch that alternates duty 0 and 1.

Two years ago, I ran a poll about which features not in FamiTone2 are most important to composers. The winners were "Cymbal duty" and "Pulse duty sweep".

Wow, tepples, after following your link to your poll, I understand now that FamiTone failed to include the 1/8 1/4 1/2 pulse duty sweep; but, FamiTone does include setting a "Duty / Noise" sequence to 1 and that's exactly what I need!! Thank you so much for your replies! You seem to be extremely experienced in forming an exhaustive range of sounds on the NES!

I turned up the sound on Thwaite, never have played it with loud volume, and your sound expertise is so much fun to listen too!

Why doesn't FamiTone (or FamiTone2) support Bxx forward references? It's crucial for the song that was just finished. Why must FamiTone songs always require full frames? It's so restrictive and unfair, to me.

edit: FamiTone supports Bxx backward references, if that is the correct term, so how much bigger would it have to be to support forward references? Could I easily add that ability to Famitone? Well, maybe no cause I bet I'd have to rewrite the TextExporter.dll and changing a dll file doesn't make sense to me.

edit2: There is only one Bxx forward reference in the song... it happens at the end of frame 02, but the third frame has Pulse 1 04 and that's repeated in another frame so can't simply move the notes backwards to fill up the rest of Pulse 1 04.


final edit: Does Famitone support just 1 forward reference? Maybe my file isn't being exported by TextExporter because Pulse 1 starts with 01 instead of 00? My mistake.