SKROM to NROM-256 w/ SRAM bus conflicts?

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emerson
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Joined: Fri Nov 18, 2016 7:29 am

SKROM to NROM-256 w/ SRAM bus conflicts?

Post by emerson » Tue Jun 12, 2018 2:27 pm

Do I need to worry about bus conflicts between the ROM and RAM for this conversion? Attached is the schematic of the circuit I used.

Edit: Updated schematic
Attachments
skrom_to_nrom_256_schematic.png
Last edited by emerson on Tue Jun 12, 2018 4:37 pm, edited 1 time in total.

lidnariq
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Location: Seattle

Re: SKROM to NROM-256 w/ SRAM bus conflicts?

Post by lidnariq » Tue Jun 12, 2018 2:46 pm

Once you have a 74'20 on hand, why do you need to start with an MMC1 board? The 74'20 by itself is all you need to add RAM.

emerson
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Re: SKROM to NROM-256 w/ SRAM bus conflicts?

Post by emerson » Tue Jun 12, 2018 3:01 pm

I figured since the SKROM already has the RAM, battery, and passives in place that it would be a lot less work to modify.

lidnariq
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Re: SKROM to NROM-256 w/ SRAM bus conflicts?

Post by lidnariq » Tue Jun 12, 2018 3:16 pm

If you're going to insist on using a donor, you might actually find it easier to start with a board containing MMC1A (no RAM protection; RAM is always enabled) or MMC1B (RAM is by default enabled). Then you won't even need to add the 74'20.

NROM games usually don't write to themselves (because it would serve no purpose: there's the answer to your question about bus conflicts, "yes, NROM has bus conflicts, no, nothing can care about whether it does because it can't have any effect"), so it's extremely unlikely that anything would tickle the MMC1 into stopping working.

emerson
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Re: SKROM to NROM-256 w/ SRAM bus conflicts?

Post by emerson » Tue Jun 12, 2018 3:29 pm

Thanks for clarifying the bus conflict concern.

I should have mentioned I removed the MMC1 and added a daughter board containing the 74'20 in its place. Your response suggests you thought I left the MMC1 connected which is not the case.

Edit: So bus conflicts will only occur of the game writes to $8000 and up?

lidnariq
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Re: SKROM to NROM-256 w/ SRAM bus conflicts?

Post by lidnariq » Wed Jun 13, 2018 12:16 am

Yes. In NROM (as with all the discrete logic mappers), ROM is enabled when A15 and M2 are high; bus conflicts happen any time two things are driving the data bus at the same time. Fancier mappers additionally test to make sure the R/W line is also high. Without testing R/W, if the 2A03 writes to $8000 and up, the ROM is still driving the data bus.

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