Let me try to answer your questions more directly:
urbanspr1nter wrote:IIRC, the VRAM address is obtained through $2006, where it has been written twice to memory by the CPU. Is my understanding on how the full 16-bit VRAM address is obtained, correct?
1. CPU writes to $2006.
-> The address latch gets filled with this byte.
2. CPU writes to $2006
-> The VRAM is constructed from (pseudo-code)
Code: Select all
vramAddr = (latch.value << 8) | mem.get(0x2006)
Not really. What you call a "latch" is actually the temporary VRAM address register, commonly referred simply as "t" around these parts. It's a 16-bit register (actually 15), and it's value comes from the values written to PPU port $2006. $2006 really is just a port: the PPU "listens" to the address and data buses waiting for this address (and it's mirrors) to be written to, and when that happens, it takes the value in the data bus and updates t accordingly.
Which bits of t are updated depends on the state of the toggle that selects between the first and second writes to $2006. The first write updates the high byte of t (except for the top 2 bits, which get cleared!), and the second write updates the low byte, and copies the full value to the effective VRAM address register, commonly called "v".
The toggle that selects between the first and second writes is shared between ports $2006 and $2005, where the PPU used it to tell whether to update the X scroll or the Y scroll.
3. CPU writes to $2007
4. PPU uses the
and writes to PPU memory with data found in $2007.
Yes, but again, there's no "data found in $2007", $2007 is just a port, when the PPU detects a write to this address, it immediately intercepts the write and captures the value being written.
Now, here is where I am stuck... Is the increment happening on vramAddr?
Or, is the increment happening in $2006.
Assuming you mean the temporary VRAM address register (t), then no, t remains unchanged until $2005, $2006 or $2000 are written to. These 3 ports affect t in some way.
I am confused about this because These values are only 8-bits and addresses are be 16-bits, right?
This is why the PPU needs a toggle to select between first and second writes, so it can get 16 bits of data through a single 8-bit port.