Sorry. I uploaded the video to youtube. It's also easier to see the glitching effect that happens while the hero is walking https://www.youtube.com/watch?v=sMkj9Mq5NO4
Ah, I see. That makes sense!tokumaru wrote: ↑Mon Apr 05, 2021 6:48 pmIf all you want is to set the increment mode for doing updates, you don't really need to preserve the other bits during the update process itself, but you do need to restore all the bits *after* the update is done, before the rendering of the new frame starts.
I don't think I understood what you meant. That routine is executed before the NMI. This is all I have in my NMI interrupt routine:tokumaru wrote: ↑Mon Apr 05, 2021 6:48 pmThese problems are most likely related. You're probably taking more time than the length of vblank to do your updates, so the frame starts with a bad scroll and the final vram writes fail.
Do not decompress data or do any sort of slow processing during vblank. The vertical blank interval is really short, so you should use it for copying already processed and buffered data to vram, otherwise you won't be able to update much data at all before the time is up.
Code: Select all
NMI: pha ; back up registers (important) txa pha tya pha ; we'll copy the sprites in range $0200 into the PPU so the sprites will be displayed LDA #$00 STA $2003 LDA #$02 ; copy sprite data from $200 into PPU display STA OAMDMA LDA #$00 STA PPUADDR ; clean up PPU address registers STA PPUADDR bit PPUSTATUS lda camerax sta PPUSCROLL lda ntscrolly sta PPUSCROLL lda camerax+1 lsr ;shift 9th bit of camerax into the carry flag lda ntscrolly+1 rol ;put it alongside the 9th bit of ntscrolly and #%00000011 ;clear irrelevant bits ora ppuctrl_mirror ;combine with the other PPUCTRL settings sta PPUCTRL LDA #%00011110 ; enable sprites, enable background, no clipping on left side STA $2001 LDA ppudrawcomplete EOR #$FF ; with this we toggle A between $00 and $FF STA ppudrawcomplete pla ; restore regs and exit tay pla tax pla RTI ; this is the opcode used to return from an interrupt routine to the previous code (analogue to RTS)