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 Posted: Fri Sep 14, 2018 9:37 pm
 Formerly ~J-@D!~

Joined: Sun Mar 12, 2006 12:36 am
Posts: 465
Location: Rive nord de Montréal
rainwarrior wrote:
A question about using an inverter as an amplifier: to accomplish this, we need to bias the input to some middle voltage? Right? (2.5v?)

The magic is that the inverter self-bias. Yep, that's right: the output and the input converges itself to about ½ Vcc; the slight discrepancy is due to unequal gate strength, and makes the output slightly toward 0V (for CMOS, N-channel is "stronger" than a P-channel because the motility of electrons is about 3 times the motility of holes)

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 Posted: Fri Sep 14, 2018 10:12 pm

Joined: Sun Apr 13, 2008 11:12 am
Posts: 7519
Location: Seattle
rainwarrior wrote:
A question about using an inverter as an amplifier: to accomplish this, we need to bias the input to some middle voltage? Right? (2.5v?)
Yup, and that's most of what the external resistor is doing there. It means that if you take the Vin vs Vout curve in the inverter, and plot that on top of a transposed version of the same, it'll self-bias to where the line crosses its transposed version.

The same is true for the Famicom/NES's internal amplifiers, and even the one inside the Famicom's microphone.

Quote:
Would a voltage divider inside the 5B before the inverter input account for the highpass strength? For example if I put the input from pin 2 through the middle of a 10k / 10k divider, it seems to lower the cutoff from ~145Hz to ~30Hz.
I'd be a little surprised if that were the relevant topology.

My hunch, as I tried to say before, is that the functional mixing circuit is something like this:
Code:
audio from 2A03 ------10k-----+
|
----------+           +-----1uF----...
inside 5B  |           |
ideal source--5k--|----1k-----+
|
----------+
Now, whether it's 5k? I can't know. But there's definitely something there to make it a less-than-ideal voltage source.

Jarhmander wrote:
Yep, that's right: the output and the input converges itself to about ½ Vcc
Only because of the external resistor to provide external negative feedback! Without that resistor, it'll just rail.

Quote:
N-channel is "stronger" than a P-channel because the motility of electrons is about 3 times the motility of holes [and therefore] makes the output slightly toward 0V
Uhhh.. sort of.

It's straightforward to design an inverter with any choice of properties you want. But that has nothing to do with CMOS vs NMOS, instead only with the properties (dimensions, doping levels, &c) of the transistors inside.

So while it's true that if you used the exact same dimensions of nMOSFET and pMOSFET, the self-bias voltage would be lower. But there's no reason that the IC designers will have chosen to make the two transistors the same size.

Furthermore, I know the MMC5 is NMOS. I suspect the 5B is also, but really don't know. The datasheet for the YM2149F says it's NMOS, but the YMZ284 datasheet says it's CMOS.

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 Posted: Fri Sep 14, 2018 10:32 pm

Joined: Sun Jan 22, 2012 12:03 pm
Posts: 6800
lidnariq wrote:
My hunch, as I tried to say before, is that the functional mixing circuit is something like this...

Ah, yes I can see in LTspice how that affects the cutoff in the same way.

Jahrmander wrote:
The magic is that the inverter self-bias. Yep, that's right: the output and the input converges itself to about ½ Vcc...
lidnariq wrote:
Yup, and that's most of what the external resistor is doing there. It means that if you take the Vin vs Vout curve in the inverter, and plot that on top of a transposed version of the same, it'll self-bias to where the line crosses its transposed version.

Ah, this is interesting. Thank you.

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 Posted: Sat Sep 15, 2018 12:28 am

Joined: Sun Jan 22, 2012 12:03 pm
Posts: 6800
I'm sure I'm missing something important here, but I figured I might as well try this just to see what it LTspice says. This appears to shift the cutoff way down compared to the op-amp version?
Edit: same as below with the PMOS backwards, and the cutoff was like 1.5Hz but it was horribly broken in this configuration anyway.

Last edited by rainwarrior on Sat Sep 15, 2018 1:21 pm, edited 3 times in total.

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 Posted: Sat Sep 15, 2018 5:52 am
 Formerly ~J-@D!~

Joined: Sun Mar 12, 2006 12:36 am
Posts: 465
Location: Rive nord de Montréal
Your pMOS transistor is reversed. Flip it vertically i.e. exchange the drain and the source.

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 Posted: Sat Sep 15, 2018 1:25 pm

Joined: Sun Jan 22, 2012 12:03 pm
Posts: 6800
Thanks, now it's working better. Now it looks more like what I expected, and I can see the 2.5V bias and proper amplification now in transient mode which I could not before. (Wish I could figure out a way to quickly switch between the transient and ac analysis modes.)

After doing this, the new cutoff appears to be ~14 Hz, so it's lowered, but not quite as drastically as with the transistor backwards. (With the op amp version it was more like 175 Hz.) Equivalent to putting more resistance... somewhere...?
Attachment:

5b_sim2c.png [ 23.86 KiB | Viewed 51 times ]

(Sorry if these are silly questions. I'm just playing around, seeing if I can learn anything at all here.)

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 Posted: Sat Sep 15, 2018 3:39 pm

Joined: Sun Jan 22, 2012 12:03 pm
Posts: 6800
Incidentally the 47µF capacitor (5V-GND) appears to fail a quick ohmmeter test (measures as a steady 500 ohms). Maybe I should consider replacing it.

I do have a crummy digital scope. I might try to measure their response later, just to try and verify that I'm not trying to replicate something that's in a broken state. (I've also asked someone else I know with a Gimmick cart to record my test, for similar verification.)

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