PPU Memory Map

Discuss emulation of the Nintendo Entertainment System and Famicom.

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JamesK89
Posts: 1
Joined: Wed Dec 02, 2009 7:06 pm

PPU Memory Map

Post by JamesK89 » Wed Dec 02, 2009 7:17 pm

Hey, I've been trying to implement a PPU now that I have a (as far as I can tell) functioning CPU core.
I've read endless amounts of documentation on both the PPU and the CPU, but with the PPU in particular there doesn't seem to be much documentation on where the memory map actually maps to.

Code: Select all

3a Memory Map
-------------

	+---------------+---------------+---------------+-----------------------+
	|    Address    |   End         |    Size       | Description           |
	+---------------+---------------+---------------+-----------------------+
	|    $0000      |    $0FFF      |    $1000      | Tile Set #0           |
	|    $1000      |    $1FFF      |    $1000      | Tile Set #1           |
	+---------------+---------------+---------------+-----------------------+
	|    $2000      |    $23FF      |    $0400      | Name Table #0         |
	|    $2400      |    $27FF      |    $0400      | Name Table #1         |
	|    $2800      |    $2BFF      |    $0400      | Name Table #2         |
	|    $2C00      |    $2FFF      |    $0400      | Name Table #3         |
	+---------------+---------------+---------------+-----------------------+
	|    $3000      |    $3EFF      |    $3EFF      | Name Table Mirror *1  |
	|    $3F00      |    $3FFF      |    $0020      | Palette *2            |
	|    $4000      |    $FFFF      |    $C000      | Mirrors of Above *3   |
	+---------------+---------------+---------------+-----------------------+
I assume that $0000-$0FFF and $1000-$1FFF are controlled by the mapper and typically map to the cart's VROM, but I'm not entirely sure if this is true.
Also is the remaining mapped memory (e.g. Name Table, Palette, etc..) map to the VRAM, the CPU's RAM or both?

If somebody could enlighten me on this I would appreciate it.

Thanks!

qeed
Posts: 61
Joined: Tue Jun 17, 2008 11:51 am

Re: PPU Memory Map

Post by qeed » Wed Dec 02, 2009 8:02 pm

JamesK89 wrote:Hey, I've been trying to implement a PPU now that I have a (as far as I can tell) functioning CPU core.
I've read endless amounts of documentation on both the PPU and the CPU, but with the PPU in particular there doesn't seem to be much documentation on where the memory map actually maps to.

Code: Select all

3a Memory Map
-------------

	+---------------+---------------+---------------+-----------------------+
	|    Address    |   End         |    Size       | Description           |
	+---------------+---------------+---------------+-----------------------+
	|    $0000      |    $0FFF      |    $1000      | Tile Set #0           |
	|    $1000      |    $1FFF      |    $1000      | Tile Set #1           |
	+---------------+---------------+---------------+-----------------------+
	|    $2000      |    $23FF      |    $0400      | Name Table #0         |
	|    $2400      |    $27FF      |    $0400      | Name Table #1         |
	|    $2800      |    $2BFF      |    $0400      | Name Table #2         |
	|    $2C00      |    $2FFF      |    $0400      | Name Table #3         |
	+---------------+---------------+---------------+-----------------------+
	|    $3000      |    $3EFF      |    $3EFF      | Name Table Mirror *1  |
	|    $3F00      |    $3FFF      |    $0020      | Palette *2            |
	|    $4000      |    $FFFF      |    $C000      | Mirrors of Above *3   |
	+---------------+---------------+---------------+-----------------------+
I assume that $0000-$0FFF and $1000-$1FFF are controlled by the mapper and typically map to the cart's VROM, but I'm not entirely sure if this is true.
Also is the remaining mapped memory (e.g. Name Table, Palette, etc..) map to the VRAM, the CPU's RAM or both?

If somebody could enlighten me on this I would appreciate it.

Thanks!
Yeah $0000 to $1FFF is either CHR-ROM you get from the ROM or is CHR-RAM (VROM/VRAM), which in that case you allow $2007 writes to the pattern tables for it to copy the CHR data to the pattern tables for rendering. Everything inside the PPU has it's own memory space so no CPU ram is involved there. The name table is the NES internal VRAM and the palette is just the indices for the colors after the CHR data is combined with attribute tables, or is transparent

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MottZilla
Posts: 2832
Joined: Wed Dec 06, 2006 8:18 pm

Post by MottZilla » Wed Dec 02, 2009 11:38 pm

In the PPU, $0000 - $1FFF is the "Pattern Table". This is where all tile graphics are fetched from. The cartridge can have ROM or RAM here. The cartridge mapper can bankswitch parts of it. Some cartridges can have both ROM and RAM here and switch it around.

The most any mapper can divide the area into is 1 Kilobyte chunks meaning every $0400 bytes would be its own area giving 8 total areas.

The $2000 - $2FFF are the four 1K Name tables. Depending on the cartridge each area can point to somewhere else.

So when designing your emulator you may want to consider these possibilities.

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Bregalad
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Joined: Fri Nov 12, 2004 2:49 pm
Location: Chexbres, VD, Switzerland

Post by Bregalad » Thu Dec 03, 2009 7:07 am

The PPU reads $0000-$1fff when fetching files, and read $2000-$2fff for nametable / attribute table data. It's up to the cartridge to select what is being returned on the bus, which could be anything really.
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