Search found 7 matches

by regiscaelus
Sun Dec 08, 2019 3:54 am
Forum: General Stuff
Topic: What do you think of FPGAs?
Replies: 51
Views: 34306

Re: What do you think of FPGAs?

I have done my own implementation of the SNES on an FPGA. I output the signal via HDMI using 480i60 which is to me the best to cope with MODE5 and 6 and it also means that I only buffer 1 scanline line to cope with the difference in clock speed between the PPU clock and the HDMI clock. Unfortunately...
by regiscaelus
Sun Aug 18, 2019 12:38 pm
Forum: SNESdev
Topic: Purpose of MAD-1 and 74139 logic for single ROM boards?
Replies: 23
Views: 26666

Re: Purpose of MAD-1 and 74139 logic for single ROM boards?

Hi, it might be a late reply to your post, but the transistor should be NPN and not PNP. What happens with this is that collector must be low to select the RAM. For the collector to go low, the emitter needs to be pulled low to make the transistor saturate as its base is pulled up via the 'RST' pin....
by regiscaelus
Sun Aug 18, 2019 12:36 pm
Forum: SNESdev
Topic: Purpose of MAD-1 and 74139 logic for single ROM boards?
Replies: 23
Views: 26666

Re: Purpose of MAD-1 and 74139 logic for single ROM boards?

Hi, it might be a late reply to your post, but the transistor should be NPN and not PNP. What happens with this is that collector must be low to select the RAM. For the collector to go low, the emitter needs to be pulled low to make the transistor saturate as its base is pulled up via the 'RST' pin....
by regiscaelus
Sat Jan 26, 2019 9:44 am
Forum: SNESdev
Topic: blargg's SPC test ROMs
Replies: 34
Views: 28737

Re: blargg's SPC test ROMs

Thank you again Kingizor. I have checked the APU IOs and they work fine. There must be something else wrong and I suspect it comes from my CPU code. I need to to test/simulate each opcode with a fine tooth comb.
by regiscaelus
Sat Jan 26, 2019 5:18 am
Forum: SNESdev
Topic: blargg's SPC test ROMs
Replies: 34
Views: 28737

Re: blargg's SPC test ROMs

Hi Kingizor,

How did you get this output. Is it via an emulator?

I can now get a pass but then it then freezes. Is it possible to get hold of the assembler code to see what the rom does.
spc_smp_001.jpg
by regiscaelus
Thu Jan 24, 2019 2:02 pm
Forum: SNESdev
Topic: blargg's SPC test ROMs
Replies: 34
Views: 28737

Re: blargg's SPC test ROMs

Great, thank you. So what you sent me is what I should be outputting. Let's have a look at DAS.
by regiscaelus
Thu Jan 24, 2019 2:11 am
Forum: SNESdev
Topic: blargg's SPC test ROMs
Replies: 34
Views: 28737

Re: blargg's SPC test ROMs

Hi byuu, Is there any form of documentation retarding these roms? I am writing a SNES in VHDL to run on an FPGA and these files are ideal to test the APU )CPU opcodes, DSP, etc.). However I get the following messages when running spc_smp.sfc and spc_dsp6.sfc. smp.jpg I can see I have issues with my ...