Search found 1723 matches

by Quietust
Wed May 12, 2021 2:01 pm
Forum: Newbie Help Center
Topic: VRC6 CHR Bank Malformed?
Replies: 29
Views: 499

Re: VRC6 CHR Bank Malformed?

A few observations: 1. You have symbolic constants for a bunch of different registers, but you never use any of them (except for the VRC6 "PPU_BANKING_STYLE" in one place) 2. At the very end of your init code is a comment ";;DON'T TURN ON RENDERING UNTIL FIRST GRAPHICS ARE DRAWN.", but the code imme...
by Quietust
Wed May 12, 2021 10:35 am
Forum: Newbie Help Center
Topic: VRC6 CHR Bank Malformed?
Replies: 29
Views: 499

Re: VRC6 CHR Bank Malformed?

Since I'm using NESASM3, would my header need to look like this? .inesprg 2 .ineschr 2 .inesmap 24 1 .bank 0 .org $8000 .org $c000 .org $e000 RESET: ; insert init code here loop: Jmp loop NMI: rti IRQ: rti .org $fffa dw NMI dw RESET dw IRQ .bank 2 .org $0000 .incbin "test0.chr" .org $0400 .incbin "...
by Quietust
Wed May 12, 2021 10:04 am
Forum: Newbie Help Center
Topic: VRC6 CHR Bank Malformed?
Replies: 29
Views: 499

Re: VRC6 CHR Bank Malformed?

I must have something set up very wrong because although my init code does start at $E000 it's also mirrored at $A000! With the VRC6, you map a single 16KB PRG ROM bank at $8000-$BFFF, an 8KB PRG ROM bank at $C000-$DFFF, and the last 8KB of PRG ROM always appears at $E000-$FFFF. Because your entire...
by Quietust
Tue May 11, 2021 6:05 am
Forum: Newbie Help Center
Topic: Problem with pointers refering to palette
Replies: 2
Views: 155

Re: Problem with pointers refering to palette

0C2FC B5 0E LDA (palpointer), x ; load data from address in pointer + x If you want to dereference a zero-page pointer and index the resulting address, you must use the Y index register - the X index register can only be used to perform indexing before dereferencing (i.e. to read a single byte from...
by Quietust
Mon May 10, 2021 6:17 pm
Forum: NESdev
Topic: MMC3 with CHR-RAM on specific device.
Replies: 10
Views: 469

Re: MMC3 with CHR-RAM on specific device.

Unless I'm missing something, your demo doesn't appear to initialize the MMC3's CHR bank registers, the mirroring state, or the IRQ counter. Many emulators initialize these to "nice" values for various unknown reasons, but other emulators (and real hardware) might not initialize them at all, causing...
by Quietust
Mon May 10, 2021 12:31 pm
Forum: Newbie Help Center
Topic: Loading levels
Replies: 6
Views: 277

Re: Loading levels

lda CurrentLevel ;gets the number of the current level asl ;multiplies it by 2 since each pointer is 2 bytes tax ;use it as an index lda CollisionPointers+0, x ;copies the low byte to ZP sta LevelCollision+0 lda CollisionPointers+1, x ;copies the high byte to ZP sta LevelCollision+1 Wouldn't Collis...
by Quietust
Sun May 09, 2021 10:32 am
Forum: NESemdev
Topic: My emulator vs. Nintendulator: Gimme a BRK
Replies: 3
Views: 384

Re: My emulator vs. Nintendulator: Gimme a BRK

Because the B flag doesn't actually exist within the status register. So if I got this right then BRK and PHP push the bit, but ithe status register doesn't store it. Thus PLP and RTI will not/can not restore it. For 6502 code this would mean only PLA can be used to retrieve it, correct? That's exa...
by Quietust
Sun May 09, 2021 5:48 am
Forum: Newbie Help Center
Topic: My cart runs differently in different emulators
Replies: 63
Views: 3005

Re: My cart runs differently in different emulators

But, remember that more than 8 sprites on the same scanline causes sprites to blink. :) No it doesn't - putting more than 8 sprites on the same scanline causes the extra ones to simply not appear . When you see sprites flickering, it's because the programmer wrote special code to rearrange the spri...
by Quietust
Sun May 09, 2021 5:36 am
Forum: NESemdev
Topic: My emulator vs. Nintendulator: Gimme a BRK
Replies: 3
Views: 384

Re: My emulator vs. Nintendulator: Gimme a BRK

This is the final RTS after running nestest from $C000 and the garbage(?) that runs after that. When kevtris wrote nestest, he forgot to put an infinite loop at the end of the "automation" mode, so instead it hits an RTS instruction, underflows the stack, then crashes. This is why the reference log...
by Quietust
Sat May 08, 2021 9:31 am
Forum: Newbie Help Center
Topic: My cart runs differently in different emulators
Replies: 63
Views: 3005

Re: My cart runs differently in different emulators

It was my understanding that a level isn't stored completely put together in the ROM (e.g. if you opened Super Mario Bros. in a CHR editor you wouldn't see World 1-1 fully assembled in there, but you would see each possible tile stored in the file. It sounds like you're saying that CHR-RAM is when ...
by Quietust
Sat May 08, 2021 9:22 am
Forum: NESemdev
Topic: My emu vs. Nintendulator: branch cycles
Replies: 12
Views: 523

Re: My emu vs. Nintendulator: branch cycles

No penalty applies to indexed write (such as sta $03F0,X ), indirect indexed write (such as sta ($02),Y ), indexed read-modify-write (such as inc $03F0,X ), or zero page indexed read (such as lda $A0,X ). This is because indexed writes and zero page indexed accesses are timed as if the penalty alwa...
by Quietust
Sat May 08, 2021 7:47 am
Forum: NESemdev
Topic: My emu vs. Nintendulator: branch cycles
Replies: 12
Views: 523

Re: My emu vs. Nintendulator: branch cycles

But the page was crossed - the instruction ended at $ F2 FE and the branch landed at $ F3 00. But F300 - F2FE = 2, and The page boundary is relative to the end of the branch instruction. Hence why the range is +129 to -126 bytes from the beginning of the instruction. I'm a little bit confused now. ...
by Quietust
Sat May 08, 2021 7:32 am
Forum: NESemdev
Topic: My emu vs. Nintendulator: branch cycles
Replies: 12
Views: 523

Re: My emu vs. Nintendulator: branch cycles

All right, here's another one, this time the other way around. Why four cycles for this branch? ; Nintendulator F2FC F0 02 BEQ $F300 A:52 X:02 Y:E9 P:67 SP:FB PPU:339,204 CYC:23308 F300 C8 INY A:52 X:02 Y:E9 P:67 SP:FB PPU: 10,205 CYC:23312 ; my flawless emulator F2FC F0 02 BEQ A:52 X:02 Y:E9 P:67 ...
by Quietust
Fri May 07, 2021 3:37 pm
Forum: NESdev
Topic: (NOOB) good MMC chip explanations/tutorials?
Replies: 7
Views: 425

Re: (NOOB) good MMC chip explanations/tutorials?

set CHR bank at $0000 lda #0 sta $8000 lda #bank sta $8001 set CHR bank at $0800 lda #1 sta $8000 lda #bank sta $8001 set CHR bank at $1a00 lda #5 sta $8000 lda #bank sta $8001 Some minor corrections: when you're mapping CHR banks at $0000 and $0800, you need to double the number written to $8001 b...
by Quietust
Thu May 06, 2021 8:06 am
Forum: NESemdev
Topic: Mapper1 implementation
Replies: 1
Views: 350

Re: Mapper1 implementation

The main problem I see is that writes to register 0 ($8000) are only updating mirroring even though they also control PRG/CHR bank sizes. You should be storing the values of all 4 registers internally (just like you are with self.control ) and then applying them to the PRG/CHR bank states whenever y...