Search found 1764 matches

by Quietust
Mon Jun 14, 2021 3:18 pm
Forum: NESemdev
Topic: Weird Zelda transition screen bug?
Replies: 8
Views: 395

Re: Weird Zelda transition screen bug?

NewRisingSun wrote:
Mon Jun 14, 2021 2:59 pm
Video 1 looks like four nametables being emulated.
I tried that too, but the resulting "blank" nametables were filled with white "0" characters - if 4-screen VRAM is being emulated, then there's got to be another PPU bug somewhere else causing it to render tile 0 incorrectly.
by Quietust
Mon Jun 14, 2021 12:25 pm
Forum: NESemdev
Topic: Weird Zelda transition screen bug?
Replies: 8
Views: 395

Re: Weird Zelda transition screen bug?

MMC1 is able to switch mirroring modes by writing to bits 1-0 of register $8000-9FFF ( https://wiki.nesdev.com/w/index.php/MMC1#Control_.28internal.2C_.248000-.249FFF.29 ). It sounds like you don't currently support this. Zelda switches mirroring depending on the direction it is going to scroll. I'...
by Quietust
Thu Jun 10, 2021 5:11 am
Forum: NES Hardware and Flash Equipment
Topic: Big RAM on FME-7: I have a test ROM
Replies: 31
Views: 36119

Re: Big RAM on FME-7: I have a test ROM

Er, just so you guys know, this thread was from over 7 years ago and got resurrected by a spambot of rather limited intelligence, so I doubt anybody's still looking to talk about this right now.
by Quietust
Wed Jun 09, 2021 8:26 pm
Forum: NESdev
Topic: Problem with palette discoloration when PPU is turned off during rendering.
Replies: 15
Views: 1716

Re: Problem with palette discoloration when PPU is turned off during rendering.

I'd be interested to know what PPU revision is in N·K's AV Famicom - maybe this glitch does not affect the RP2C02G present in most front loading NES units? I've actually run across a similar issue, not sure if it's the same, but, when i was cutting off the bottom 16 scanlines with background and spr...
by Quietust
Wed Jun 09, 2021 9:58 am
Forum: NESemdev
Topic: Handling Illegal Opcodes
Replies: 10
Views: 989

Re: Handling Illegal Opcodes

How you handle illegal opcodes is entirely up to you, but there are several methods to choose from: 1. Immediately halt emulation and don't allow it to resume. If you hit one of the "HLT"/"KIL" opcodes (02/22/42/62 or 12/32/52/72/92/B2/D2/F2), this is technically the "correct" way of responding. 2. ...
by Quietust
Tue Jun 08, 2021 12:28 pm
Forum: Newbie Help Center
Topic: Questions About DPCM and PCM
Replies: 21
Views: 1435

Re: Questions About DPCM and PCM

2. Your code to update the pointer after the index register overflows will take extra time, causing that specific loop iteration to be longer than normal (and possibly causing an audible error in the sound output). You should be able to fix it by branching to the 5th NOP instruction instead of the ...
by Quietust
Tue Jun 08, 2021 11:49 am
Forum: Newbie Help Center
Topic: Questions About DPCM and PCM
Replies: 21
Views: 1435

Re: Questions About DPCM and PCM

Hmm, I think I'm doing something a bit wrong as, if I put this code and is not being activated by a button, it kind of sounds murky and just loops infinitely (only want to play it once), but if I do map it to a button press, the sample plays pretty much right but garbage also plays before repeating...
by Quietust
Tue Jun 08, 2021 10:27 am
Forum: Newbie Help Center
Topic: Questions About DPCM and PCM
Replies: 21
Views: 1435

Re: Questions About DPCM and PCM

There are tools for converting WAV to the used 7-bit format here and there . NESASM or ASM6 shouldn't matter. You start and stop DPCM samples by writing 1 or 0 respectively to $4015 D4. It's not like the other channels where you can just mute them. Thank you for the conversion tools, will check the...
by Quietust
Mon Jun 07, 2021 6:46 pm
Forum: Reproduction
Topic: NC pins - connect to GND or VCC
Replies: 10
Views: 992

Re: NC pins - connect to GND or VCC

More specifically, a pin marked as "NC" could be one of several things: 1. A pin that isn't connected to the internals of the chip at all, but exists solely because of the chip's physical form factor (e.g. a DIP chip needs to have an even number of pins, and a QFP chip is probably going to have a mu...
by Quietust
Sat Jun 05, 2021 7:20 pm
Forum: General Stuff
Topic: Becoming an FPGA Engineer
Replies: 48
Views: 5013

Re: Becoming an FPGA Engineer

Would anyone be so nice to check my code for obvious errors? -- Handle Register Writes: process( m2, cpu_rw, cpu_address_bus, reg_bit_counter, control_reg, prg_bank_reg ) begin if (m2'event) and (m2='0') and (cpu_rw='0') and (cpu_address_bus(15)='0') then if cpu_data_bus(7) = '1' then -- Reset dete...
by Quietust
Fri Jun 04, 2021 10:39 am
Forum: Reproduction
Topic: iNes mapper 75 with 256KiB PRG
Replies: 8
Views: 902

Re: iNes mapper 75 with 256KiB PRG

Try this: Huh, that's pretty clever - slightly wasteful (using a 4x4 register file but only using slightly less than a quarter of it, though I suppose you could connect the other 3 bits in order to boost it all the way to 2MB), but it takes advantage of the VRC1's register layout (with the PRG bank...
by Quietust
Fri Jun 04, 2021 9:37 am
Forum: NESdev
Topic: MMC3 Setup Woes
Replies: 6
Views: 705

Re: MMC3 Setup Woes

I suppose I don't fully understand how these config files work. Here's what I am looking for: 64 KB total PRG ROM 4 banks, in MMC3 format (8 KB each): Bank 0 @ $8000-$9FFF Bank 1 @ $A000-$BFFF Bank 2 @ $C000-$DFFF Bank 3 @ $E000-$FFFF Reset function in last bank ($E000) Those numbers don't add up -...
by Quietust
Fri Jun 04, 2021 9:17 am
Forum: Reproduction
Topic: iNes mapper 75 with 256KiB PRG
Replies: 8
Views: 902

Re: iNes mapper 75 with 256KiB PRG

The Konami VRC1 is itself incapable of supporting more than 128KB of PRG ROM - it only has 4 data input pins, so all of its registers are 4 bits wide. Supporting a game larger than that would require an additional "outer bank" register, either implemented outside the chip (similar to MMC3-using mult...
by Quietust
Fri Jun 04, 2021 9:03 am
Forum: NESdev
Topic: MMC3 Setup Woes
Replies: 6
Views: 705

Re: MMC3 Setup Woes

That makes sense, so I understand that I need to expand my ROM memory definitions to include all data. I think what I don't fully understand is how the cartridge memory is mapped in relation to the definitions in these config files. I've followed your lead and edited mine, though still no luck with...
by Quietust
Fri Jun 04, 2021 8:13 am
Forum: NESdev
Topic: MMC3 Setup Woes
Replies: 6
Views: 705

Re: MMC3 Setup Woes

Your config file's MEMORY section says there is only one "ROM" bank of size $8000 (i.e. 32KB), so it's presumably only outputting half of your data. I'm not sure what's the proper way of handling multiple overlapping banks in CA65, but in one of my own projects I basically had one MEMORY entry and o...