Hi,
I just came across this topic, this VeriSNES project looks awesome!
I've written some FPGA cores too, especially SEGA Genesis/Megadrive, PC-Engine/TurboGrafx-16 (both in VHDL) and Atari Jaguar (Verilog).
See my site http://lvt.tl/ for more information, and my GitHub repos https://github.com/Torlus
Is there any way I could help, if needed ?
What about the current status of the project, especially licensing/source status (open or closed) ?
Regards,
Gregory
Introducing the VeriSNES (FPGA-based SNES)
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Re: Introducing the VeriSNES (FPGA-based SNES)
Those are some impressive cores! Would you consider porting them to the MiSTer project?: https://github.com/MiSTer-devel/Main_MiSTer/wiki
Re: Introducing the VeriSNES (FPGA-based SNES)
Already done. Except for the Atari Jaguar where the requirements are too high.retrorgb wrote:Those are some impressive cores! Would you consider porting them to the MiSTer project?: https://github.com/MiSTer-devel/Main_MiSTer/wiki
Re: Introducing the VeriSNES (FPGA-based SNES)
Wow, thank you! Too bad about the Jag! I wonder if it's powerful enough to run a SNES core as well?
Re: Introducing the VeriSNES (FPGA-based SNES)
As the Genesis/Megadrive core works, I’d say yes.retrorgb wrote:Wow, thank you! Too bad about the Jag! I wonder if it's powerful enough to run a SNES core as well?
However, this will remain a supposition until I can see the source code.
Re: Introducing the VeriSNES (FPGA-based SNES)
Yes it is. The Super NT's FPGA is approximately half the size of the one in the MiSTer, and VeriSNES has already been ported to the MiSTer: https://www.youtube.com/watch?v=7ae5iUe8diYretrorgb wrote:Wow, thank you! Too bad about the Jag! I wonder if it's powerful enough to run a SNES core as well?
Re: Introducing the VeriSNES (FPGA-based SNES)
jwdonal, can you reconsider releasing the source for the benefit of MiSTer and other future community driven FPGA solutions? From a preservation perspective it would be of large benefit, and you might even make some money from your goodwill if you also have a patreon account.
And with the open source SD2SNES now supporting pretty much all the desired special chip games, there could presumably be a single device FPGA solution to playing essentially all of the SNES library (as I'm sure somebody would port that code to the MiSTer).
And with the open source SD2SNES now supporting pretty much all the desired special chip games, there could presumably be a single device FPGA solution to playing essentially all of the SNES library (as I'm sure somebody would port that code to the MiSTer).
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Re: Introducing the VeriSNES (FPGA-based SNES)
That may not be the case. There are people like ElectronAsh working on porting your Jaguar core to mister. Maybe check it out and see how it's going?Torlus wrote:Already done. Except for the Atari Jaguar where the requirements are too high.retrorgb wrote:Those are some impressive cores! Would you consider porting them to the MiSTer project?: https://github.com/MiSTer-devel/Main_MiSTer/wiki