Code: Select all

```
Cpu 1:
36:852d cmp $2143 (in = $43)
spc-pre hc=1072 vc=170 fc=336 || cycle=11472160 target=11472158
36:852D A=0053 hc=1072 vc=170 fc=336
spc-post hc=1102 vc=170 fc=336 || cycle=11472160 target=11472160
Cpu 2:
36:8530 bne $852d
...095d mov a,#$53
spc-pre hc=1102 vc=170 fc=336 || cycle=11472160 target=11472160
36:8530 A=0053 hc=1102 vc=170 fc=336
spc-post hc=1124 vc=170 fc=336 || cycle=11472160 target=11472163
...095D A=06 hc=1124 vc=170 fc=336 || cycle=11472160 target=11472163
Cpu 3:
36:852d cmp $2143 (in = $43 --> $53)
...095f mov $0f7,a
spc-pre hc=1124 vc=170 fc=336 || cycle=11472164 target=11472163
36:852D A=0053 hc=1124 vc=170 fc=336
...095F A=53 hc=1154 vc=170 fc=336 || cycle=11472164 target=11472165
spc-post hc=1154 vc=170 fc=336 || cycle=11472172 target=11472165
** important note: SPC cycle 11472172 is when $0f7 is "officially" committed and done (8 cycle SPC instruction)
Reading any time between 11472164 - 11472171 can be considered stale or unstable
Cpu 4:
36:8530 bne $852d
spc-pre hc=1154 vc=170 fc=336 || cycle=11472172 target=11472165
36:8530 A=0053 hc=1154 vc=170 fc=336
spc-post hc=1170 vc=170 fc=336 || cycle=11472172 target=11472167
** error: now we're exiting spin loop too early
Cpu 5:
36:8532 lda #$59 (error: we shouldn't be here yet)
spc-pre hc=1170 vc=170 fc=336 || cycle=11472172 target=11472167
36:8532 A=0053 hc=1170 vc=170 fc=336
spc-post hc=1186 vc=170 fc=336 || cycle=11472172 target=11472168
Cpu 6:
36:8534 sta $2143 (error: this is bad. spc will not see old $0f7 = $53 value)
spc-pre hc=1186 vc=170 fc=336 || cycle=11472172 target=11472168
36:8534 A=0059 hc=1186 vc=170 fc=336
spc-post hc=1216 vc=170 fc=336 || cycle=11472172 target=11472171
*** note: we could also do something similar for spc in-port.
spc timing port update.
Cpu 7:
36:8537 cmp $2143
...0961 cmp a,$0f7 ($0f7 = $59, bad bad)
spc-pre hc=1216 vc=170 fc=336 || cycle=11472172 target=11472171
36:8537 A=0059 hc=1216 vc=170 fc=336
...0961 A=53 hc=1246 vc=170 fc=336 || cycle=11472172 target=11472174
spc-post hc=1246 vc=170 fc=336 || cycle=11472178 target=11472174
** note: 11472172 SPC cycle reached. Should be safe to update SMP -> CPU port.
But it's way too late now.
Cpu 8:
36:853a bne $8537 (start spin loop)
spc-pre hc=1246 vc=170 fc=336 || cycle=11472178 target=11472174
36:853A A=0059 hc=1246 vc=170 fc=336
spc-post hc=1268 vc=170 fc=336 || cycle=11472178 target=11472176
Cpu 9:
36:8537 cmp $2143
...0963 bne $0961
spc-pre hc=1268 vc=170 fc=336 || cycle=11472178 target=11472176
36:8537 A=0059 hc=1268 vc=170 fc=336
...0963 A=53 hc=1298 vc=170 fc=336 || cycle=11472178 target=11472179
spc-post hc=1298 vc=170 fc=336 || cycle=11472186 target=11472179
Cpu x:
We're fatally deadlocked. The End.
spc-pre hc=1298 vc=170 fc=336 || cycle=11472186 target=11472179
36:853A A=0059 hc=1298 vc=170 fc=336
spc-post hc=1320 vc=170 fc=336 || cycle=11472186 target=11472181
spc-pre hc=1320 vc=170 fc=336 || cycle=11472186 target=11472181
36:8537 A=0059 hc=1320 vc=170 fc=336
spc-post hc=1350 vc=170 fc=336 || cycle=11472186 target=11472184
spc-pre hc=1350 vc=170 fc=336 || cycle=11472186 target=11472184
36:853A A=0059 hc=1350 vc=170 fc=336
spc-post hc=8 vc=171 fc=336 || cycle=11472186 target=11472186
spc-pre hc=8 vc=171 fc=336 || cycle=11472186 target=11472186
36:8537 A=0059 hc=8 vc=171 fc=336
...0961 A=53 hc=38 vc=171 fc=336 || cycle=11472186 target=11472189
spc-post hc=38 vc=171 fc=336 || cycle=11472192 target=11472189
spc-pre hc=38 vc=171 fc=336 || cycle=11472192 target=11472189
36:853A A=0059 hc=38 vc=171 fc=336
spc-post hc=60 vc=171 fc=336 || cycle=11472192 target=11472191
spc-pre hc=60 vc=171 fc=336 || cycle=11472192 target=11472191
36:8537 A=0059 hc=60 vc=171 fc=336
...0963 A=53 hc=90 vc=171 fc=336 || cycle=11472192 target=11472194
spc-post hc=90 vc=171 fc=336 || cycle=11472200 target=11472194
```