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 Post subject: SA-1 chip pinout
PostPosted: Sun Dec 09, 2012 12:01 pm 
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Joined: Tue Aug 15, 2006 5:23 am
Posts: 172
Location: Spain
Has anybody got a reliable SA-1 pinout? I'm adding this chip to qwertymodo's EAGLE library and I have a "likely" pinout but I don't know where SRAM A15 to A20 address lines are located. My guess is that in pins 104 to 107 and 81, but not sure at all.

Is there any game using SA-1 and 2 Mbyte RAM? Or is there even a board which could support 2 Mbytes?


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 Post subject: Re: SA-1 chip pinout
PostPosted: Sun Dec 09, 2012 3:04 pm 
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Joined: Fri Feb 24, 2012 12:09 pm
Posts: 557
2Mbyte RAM? Nintendo hasn't used such large RAMs in any SNES cartridges. Biggest should be 128K in a few games, and 512K in Satellaview BIOS (not SA-1 related, it's just the biggest RAM size they have used).

I have scribbled down SA-1 pinouts a while ago, too (but didn't have released them yet).
The cartridge I had borrowed is Kirby's Fun Pak (PAL) "SNSP-1L3B-20" with 28pin 8Kbyte SRAM.

According to the "3B" in the PCB name, 8Kbyte (A0..A12) would be max size for that board, but A13,A14 are also connected on the 28pin chip, and there are even solder-pads for 32pin SRAMs, which seem to connect A15,A16,A18. And A17, on a 32pin chip, A17 should replace Vbat (on a 28pin chip), there are actually solder pads for replacing that pin (though my original conclusion was that it replaces Vbat by CS, which was probably wrong).

Anyways, SA-1 pin-outs as far as I could tell:
Code:
  1 SNES./IRQ
  2 SNES.D7
  3 SNES.D3
  4 SNES.D6
  5 SNES.D2
  6 SNES.D5
  7 SNES.D1
  8 SNES.D4
  9 SNES.D0
  10 VCC
  11 GND
  12 SNES.A23
  13 SNES.A0
  14 SNES.A22
  15 SNES.A1
  16 SNES.A21
  17 SNES.A2
  18 SNES.A20
  19 SNES.A3
  20 SNES.A19
  21 SNES.A4
  22 SNES.A18
  23 SNES.A5
  24 SNES.A17
  25 SNES.A6
  26 SNES.A16
  27 SNES.A7
  28 SNES.A15
  29 SNES.A8
  30 SNES.A14
  31 SNES.A9
  32 SNES.A13
  33 SNES.A10
  34 SNES.A12
  35 SNES.A11
  36 VCC
  37 GND
  38 REFRESH
 ---
  39 GND
  40 X.?
  41 X.?
  42 GND
  43 ROM.D15 pin31 (D15/A0)
  44 ROM.D7  pin30
  45 ROM.D14 pin29
  46 ROM.D6  pin28
  47 ROM.D11 pin22
  48 ROM.D3  pin21
  49 ROM.D10 pin20
  50 ROM.D2  pin19
  51 ROM.D13 pin27
  52 ROM.D5  pin26
  53 ROM.D12 pin25
  54 ROM.D4  pin24
  55 ROM.D9  pin18
  56 ROM.D1  pin17
  57 ROM.D8  pin16
  58 ROM.D0  pin15
  59 ROM.A1  pin11
  60 ROM.A2  pin10
  61 ROM.A3  pin9
  62 ROM.A4  pin8
  63 ROM.A5  pin7
  64 ROM.A6  pin6
 ---
  65 ROM.A7  pin5
  66 ROM.A8  pin4
  67 ROM.A9  pin42
  68 ROM.A10 pin41
  69 ROM.A11 pin40
  70 ROM.A12 pin39
  71 ROM.A13 pin38
  72 ROM.A14 pin37
  73 ROM.A15 pin36
  74 ROM.A16 pin35
  75 ROM.A17 pin34
  76 ROM.A19 pin2
  77 ROM.A18 pin3
  78 ROM.A20 pin43
  79 ROM.A21 pin44
  80 ROM.A22 pin1
  81           maybe A23 ?
  82 GND?
  83 VCC
  84 GND
  85 GND?
  86 SRAM. A16?  pin1-1 (extra pin)
  87 SRAM. A14   pin1
  88 SRAM. A12   pin2
  89 SRAM.A7  pin3
  90 SRAM.A6  pin4
  91 SRAM.A5  pin5
  92 SRAM.A4  pin6
  93 SRAM.A3  pin7
  94 SRAM.A2  pin8
  95 SRAM.A1  pin9
  96 SRAM.A0  pin10
  97 SRAM. A10   pin21
  98 SRAM. A11   pin23
  99 SRAM. A9    pin24
  100 GND
  101 VCC
  102 SRAM. A8   pin25
 ---
  103 to left-solder pads (U4.3.CS) (aka SRAM.A13)
  104 SRAM. A18?? pin1-2 (extra pin)
  105 SRAM. A15  pin28+1 (extra pin)
  106
  107
  108 SRAM. /OE  pin22
  109 SRAM. /WE  pin27
  110 SRAM.D0 pin11
  111 SRAM.D1 pin12
  112 SRAM.D2 pin13
  113 SRAM.D3 pin15
  114 SRAM.D4 pin16
  115 SRAM.D5 pin17
  116 SRAM.D6 pin18
  117 SRAM.D7 pin19
  118 GND
  119 VCC
  120 SNES./RESET
  121 SNES.SYSCK
  122 SNES.CIC3 (3.072MHz)
  123 SNES.CIC2
  124 SNES.CIC1
  125 SNES.CIC0
  126 SNES./WR
  127 PAL/NTSC (GND=NTSC, VCC=PAL) (for CIC mode and/or HV-timer?)
  128 SNES./RD

ROM-Chip Note: ROM./CE and ROM./OE are wired to GND (always enabled).
ROM-Chip Note: ROM.BHE is wired to VCC (always 16bit databus mode).
U4.Pin5./CS ---> SRAM./CS pin20 (U4:6129A aka PCB:MM1026AF)
U4.Pin3.CS ---> SRAM.A13? pin26
(left 4 solder-pads near U4 --> SRAM.pin26 = CS or A14)
(right 4 solder-pads near U4 --> SRAM.pin28 = CS or Vbat)
Cart Slot Unused: /ROMSEL
Cart Slot Used: SHIELD (!)


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 Post subject: Re: SA-1 chip pinout
PostPosted: Mon Dec 10, 2012 12:37 am 
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Joined: Tue Aug 15, 2006 5:23 am
Posts: 172
Location: Spain
nocash wrote:
2Mbyte RAM? Nintendo hasn't used such large RAMs in any SNES cartridges. Biggest should be 128K in a few games, and 512K in Satellaview BIOS (not SA-1 related, it's just the biggest RAM size they have used).


Maybe, but SNES developer books states that maximum RAM for SA-1 is 2 Megabyte, so address lines A0 to A20 must be output from the chip side. Besides, in your "full snes database" the same RAM amount is stated as the maximum.
So you have three ways of adressing 2 Megabyte:
1) 2Mx8 RAM chip -> pretty unusual since this kind of chips were not common at all back in those days. I only know Cypress and Hyundai TSOP RAM chips which match 2M x 8 capacity.
2) 1Mx16 RAM chip -> SA-1 RAM bus is not 16bit width, so this is imposible.
3) 2 different 1Mx8 RAM chips -> this implies A0 to A19 routed to both chips and you select each one with two different /CS.

In any case, there are not enough unused pins in my pinout (not even in yours) to make the connections. I guess the developer book could be wrong and maybe it means 2Mbit (512k x 8) rather than 2Mbyte.

As for your pinout, it differs in mine:
Code:
 ..........
 40 MasterClock (21.477MHz)
 41 MasterClock (21.477MHz)
 ..........
 81 Probably RAM.A19 or RAM.A20?
 ..........
 106 RAM.A17?
 107 RAM.A19 or RAM.A20?


Pin 81 can't be ROM.A23 since maximum addressable ROM is 64 Megabits, i.e., 4Mx16, so A0..A21 are needed (A1..A22 in your pinout).


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 Post subject: Re: SA-1 chip pinout
PostPosted: Mon Dec 10, 2012 5:13 am 
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Joined: Fri Feb 24, 2012 12:09 pm
Posts: 557
> Pin 81 can't be ROM.A23 since maximum addressable ROM is 64 Megabits
Yes, with 3bit ROM bank number in 1Mbyte units. But there are 3 more "unused" bits in the ROM bank selection register, theoretically that bits could address more ROM banks.

> I guess the developer book could be wrong and maybe it means 2Mbit (512k x 8) rather than 2Mbyte.
Yeah, guess so, too. 2Mbit (256Kx8, guess you meant that; not 512Kx8) sounds right, and would match with the 5bit RAM bank number in 8Kbyte units, though there are some unused bits in the bank selection register too, so theoretically more RAM would be possible. With only 256Kx8, the "A18" pin would have to be something else.

> 40 MasterClock (21.477MHz)
> 41 MasterClock (21.477MHz)
Yup.

> 81 Probably RAM.A19 or RAM.A20?
> 106 RAM.A17?
> 107 RAM.A19 or RAM.A20?
One way to be sure would be to pulse them by software (by writing to RAM bank register), and then view them via oscilloscope. Only, the SMD pins are so tiny that it wouldn't be fun to do that :-/

The other pins are same as mine? The addr/data lines are so messy zigzagged, that I wasn't sure if I got all of them right.
And the "supply" pins are same, too? The VCC/GND pairs are probably real supply. The two GND pins near MasterClock might be shielding. The other two GNDed pins (pin 82 and 85) might be some inputs/mode selection/memory config stuff or so. And pin127 should be PAL/NTSC mode (wired to VCC in my PAL cart), don't know if it affects the CIC or HV-timer or both.


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 Post subject: Re: SA-1 chip pinout
PostPosted: Mon Dec 10, 2012 6:22 am 
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Joined: Tue Aug 15, 2006 5:23 am
Posts: 172
Location: Spain
nocash wrote:
...(256Kx8, guess you meant that; not 512Kx8)... sounds right, and would match with the 5bit RAM bank number in 8Kbyte units, though there are some unused bits in the bank selection register too, so theoretically more RAM would be possible. With only 256Kx8, the "A18" pin would have to be something else..


Yes, I meant 256Kx8 :=) but then there are some missing/unused pins


nocash wrote:
> 81 Probably RAM.A19 or RAM.A20?
> 106 RAM.A17?
> 107 RAM.A19 or RAM.A20?
One way to be sure would be to pulse them by software (by writing to RAM bank register), and then view them via oscilloscope. Only, the SMD pins are so tiny that it wouldn't be fun to do that :-/


In Super Mario RPG board, this pins are not routed, but maybe they are in some other SA-1 board and so we could use the oscilloscope in the vias. I did it with pin 105, routed to nowhere through a via: I decapped the upper film until the cupper was accesible and then tested continuity with the multimeter.



nocash wrote:
The other pins are same as mine? The addr/data lines are so messy zigzagged, that I wasn't sure if I got all of them right.
And the "supply" pins are same, too? The VCC/GND pairs are probably real supply. The two GND pins near MasterClock might be shielding. The other two GNDed pins (pin 82 and 85) might be some inputs/mode selection/memory config stuff or so. And pin127 should be PAL/NTSC mode (wired to VCC in my PAL cart), don't know if it affects the CIC or HV-timer or both.


Yes, all the other pins are same as yours, and I tested from Super Mario RPG and PGA Tour Golf 96 boards, so it's likely we are not wrong ;)
The zigzagged layout for ROM data bus and SNES address bus is due to make easier the track routing.
As for pin 127, I am 100% sure it affects to CIC and pretty sure it also affects HV-Timer: if you lift the pin and connect it to VCC, the game runs in a PAL but some glitches appear.


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