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Halt check during halt

Posted: Sun Dec 16, 2018 11:58 am
by Alyosha_TAS
I've been working through Wilbert Pol's tests (which are variants of gekkio's with more variations) and so far for regular gameboy I am able to pass them all.

But once I started working on GBC variants things started to not add up. The tests that didn't require a halt seem to work ok (except for edge case LY ones) but basically all the ones using halt were failing.

For GB, when I do halt, I do the check for IRQs on the first cycle of each 4 cycle HALT loop. This works for GB and seems to be correct.

But for GBC, it seems like I need to do the check on the third cycle. Then all the tests magically pass for it too. Also doing this doesn't seem to negatively effect anything that I can measure.

For reference, all normal instructions check on the third cycle. I'm pretty sure this was mentioned by Gekkio somewhere.

Does anyone have any insight into this? It certainly seems correct, but I don't have any other point of reference besides these tests.

Re: Halt check during halt

Posted: Fri Jan 04, 2019 6:18 pm
by ISSOtm
I have asked Liji, developer of SameBoy (possibly the most accurate GB emulator as of now), about STAT interrupt timings. (Basically by how much I can expect the ISR to be delayed from HBlank due to for example multi-cycle instructions)

He mentioned that on DMG exclusively, the interrupt might be serviced one M-cycle earlier if HALT was being executed at the time the interrupt is asserted.
That probably means that what you're doing is correct, but in the worst case, maybe you could check against SameBoy's code (which afaik passes these tests.)