It is currently Thu Nov 15, 2018 6:24 pm

All times are UTC - 7 hours





Post new topic Reply to topic  [ 19 posts ]  Go to page 1, 2  Next
Author Message
PostPosted: Sat Apr 19, 2014 2:27 pm 
Offline

Joined: Thu Feb 28, 2013 11:14 am
Posts: 43
Hi there
I had decided to rewrite whole core of my emulator. Therefore I started to investigate how NES works precisely by clocks. Right now I am trying to implement APU frame counter and found some difficulties. I wrote everything I know about frame counter here (russian).
As I don't know how to implement it right now, I've wrote some tests (but can't test it on real hardware though). It can be found here.
The problem is that no emulator can pass all the tests (actually the old version of my emulator even freezes on the last one). Did I make a mistake in the tests? All explanation about them can be found in the post I mentioned above.
Please comment this post, I need your feedback.


Top
 Profile  
 
PostPosted: Sat Apr 19, 2014 9:08 pm 
Offline
User avatar

Joined: Fri Nov 19, 2004 7:35 pm
Posts: 4105
Bizhawk passes all 4 tests. I've also tested may other emulators. The more accurate emulators (Nestopia, Nintendulator, Punes) fail test #3, and pass the rest, while FCEUX fails #2 and passes the rest. PocketNES passes all 4 tests for some reason.
Have the tests actually been confirmed to work on a console?

If all the "accurate" emulators are failing test #3, and it's not tested on a console, then it's possible that failing is correct.

But yeah, IRQ timing is really weird, since it can happen earlier or later depending on what kinds of instructions are executed. The CPU Interrupts Test V2 really reveals a lot, since most emulators fail it. Punes and Bizhawk pass all those tests.

_________________
Here come the fortune cookies! Here come the fortune cookies! They're wearing paper hats!


Top
 Profile  
 
PostPosted: Sun Apr 20, 2014 1:34 am 
Offline

Joined: Thu Feb 28, 2013 11:14 am
Posts: 43
I am not sure about BizHawk, it seems it have a lot of problems with APU, especially with timer periods and frame counter.
What I tried to test is interference between clocking length counter by 0x4017 and by frame counter.
test_1.nes:
Code:
CPU           [phi2][phi1][phi2][phi1][phi2][phi1][phi2][phi1][phi2][phi1][phi2][phi1]
APU                ][   phi1   ][   phi2   ][   phi1   ][   phi2   ][   phi1   ][
R/~W            1  ][    0     ][          1   
phi2          [ 1  ][ 0  ][ 1  ][ 0  ][ 1  ][ 0  ][ 1  ][ 0  ][ 1  ][ 0  ][ 1  ][ 0  ]
FrameLFSR      2287][         450f         ][         0a1f         ][      7fff
~HalfFrame                        1                    ][ 0  ][       1
~QuarterFrame                     1                    ][ 0  ][       1
Pulse0Len                        01                    ][            00

test_2.nes:
Code:
CPU           [phi2][phi1][phi2][phi1][phi2][phi1][phi2][phi1][phi2][phi1]
APU                ][   phi2   ][   phi1   ][   phi2   ][   phi1   ][
R/~W            1  ][    0     ][          1   
phi2          [ 1  ][ 0  ][ 1  ][ 0  ][ 1  ][ 0  ][ 1  ][ 0  ][ 1  ][ 0  ]
FrameLFSR         450f         ][         0a1f         ][    7fff         
~HalfFrame                    1            ][ 0  ][           1
~QuarterFrame                 1            ][ 0  ][           1
Pulse0Len                    01            ][                00

test_3.nes:
Code:
CPU           [phi2][phi1][phi2][phi1][phi2][phi1][phi2][phi1][phi2][phi1][phi2][phi1]
APU                ][   phi1   ][   phi2   ][   phi1   ][   phi2   ][   phi1   ][
R/~W            1  ][    0     ][          1   
phi2          [ 1  ][ 0  ][ 1  ][ 0  ][ 1  ][ 0  ][ 1  ][ 0  ][ 1  ][ 0  ][ 1  ][ 0  ]
FrameLFSR      450f][         0a1f         ][         7fff         ][      7fff
~HalfFrame            1        ][ 0  ][       1        ][ 0  ][       1
~QuarterFrame         1        ][ 0  ][       1        ][ 0  ][       1
Pulse0Len            01        ][          00          ][            ff

test_4.nes:
Code:
CPU           [phi2][phi1][phi2][phi1][phi2][phi1][phi2][phi1][phi2][phi1]
APU                ][   phi2   ][   phi1   ][   phi2   ][   phi1   ][
R/~W            1  ][    0     ][          1   
phi2          [ 1  ][ 0  ][ 1  ][ 0  ][ 1  ][ 0  ][ 1  ][ 0  ][ 1  ][ 0  ]
FrameLFSR         0a1f         ][         7fff         ][    7fff         
~HalfFrame      1  ][ 0  ][       1        ][ 0  ][         1
~QuarterFrame   1  ][ 0  ][       1        ][ 0  ][         1
Pulse0Len       01 ][          00          ][              ff

But it's my first try to write a test for emulators, so I could mess up.
Old version of my emulator passed cpu_interrupts_v2 and most of apu tests, but I know for sure that my code for 0x4017 was not correct and these tests show it. I was lacking of understanding how frame counter really works, docs are too cloudy. Maybe someone made the same mistakes as I did.


Top
 Profile  
 
PostPosted: Sun Apr 20, 2014 6:14 am 
Offline

Joined: Sun Sep 19, 2004 11:12 pm
Posts: 20770
Location: NE Indiana, USA (NTSC)
Should I test this on my PowerPak in a few hours after my Resurrection Sunday meeting?


Top
 Profile  
 
PostPosted: Sun Apr 20, 2014 8:16 am 
Offline

Joined: Thu Feb 28, 2013 11:14 am
Posts: 43
tepples, I want to add tests for mode 1 too then (in case if someone would think, that in first two cases length counter clocked only once because of mode change)


Attachments:
test_apu.tar.gz [9.34 KiB]
Downloaded 135 times
Top
 Profile  
 
PostPosted: Sun Apr 20, 2014 10:19 am 
Offline

Joined: Sun Sep 19, 2004 11:12 pm
Posts: 20770
Location: NE Indiana, USA (NTSC)
test_1, test_2, test_4, test_5, test_6, and test_8 passed and remained passing after 9 resets
test_3 and test_7 switched between fail and pass when pressing reset (alignment sensitive?)


Top
 Profile  
 
PostPosted: Sun Apr 20, 2014 10:38 am 
Offline

Joined: Thu Feb 28, 2013 11:14 am
Posts: 43
That's exactly what you would see with puNES or Nestopia. Actually I tried to avoid alignment, so it is highly possible that it's my fault here.


Top
 Profile  
 
PostPosted: Sun Apr 20, 2014 11:01 am 
Offline

Joined: Thu Feb 28, 2013 11:14 am
Posts: 43
Ok, now it looks better. I've corrected my algorithm, now it should correctly avoid jitter. Many emulators, that failed test_3, now pass all the tests. However it's not good news for others.

UPD. Hold on. Now Visual 2A03 does not pass test_3. I can't understand anything now...
UPD2. Now it really looks like there is an error in Visual 2A03. And I've completely lost my faith in it.
UPD3. However, I don't see any reason test_9 and test_10 to be wrong. Emulators fail, must be tested on a real NES I guess...


Attachments:
test_apu.tar.gz [28.74 KiB]
Downloaded 134 times
Top
 Profile  
 
PostPosted: Mon Apr 21, 2014 11:02 am 
Offline
User avatar

Joined: Sun Sep 19, 2004 10:59 pm
Posts: 1440
I never claimed that Visual 2A03 or Visual 2C02 would be fully accurate - their main usefulness is in tracing out circuits more easily (since you won't need to follow the lines around and hope you don't miss a connection).

If you've found significant problems in those simulators, it would help to mention exactly where they are so I can possibly try to fix them (some problems are timing-related and can be fixed by reordering nodes, while others might be transcription errors where things aren't connected properly).

_________________
Quietust, QMT Productions
P.S. If you don't get this note, let me know and I'll write you another.


Top
 Profile  
 
PostPosted: Mon Apr 21, 2014 11:24 am 
Offline

Joined: Thu Feb 28, 2013 11:14 am
Posts: 43
Quietust
Well, it does not pass even basic Shay's tests. For example "Writing $00 or $80 to $4017 shouldn't affect flag" (3-irq_flag.s:39)
Code:
cycle ab   db rw Fetch        pc   a  x  y  s  p             frm_t frm_a frm_b frm_c frm_d frm_e frm_f frame_irq frm_quarter frm_half sq0_len
62374 0031 b8 1  CLV          0031 00 00 00 ba nv&#8209BdIzc 7ffc  0     0     0     0     0     0     0         1           1        00
62374 0030 40 1               0030 00 00 00 ba nv&#8209BdIZc 7ffe  0     0     0     0     0     0     0         1           1        00
62373 0030 40 1               0030 00 00 00 ba nv&#8209BdIZc 7ffe  0     0     0     0     0     0     0         1           1        00
62373 002f 29 1  AND #   002f 00 00 00 ba nv&#8209BdIZc 7ffe  0     0     0     0     0     0     0         1           1        00
62372 002f 29 1  AND #   002f 00 00 00 ba nv&#8209BdIZc 7ffe  0     0     0     0     0     0     0         1           1        00
62372 4015 00 1               002f 80 00 00 ba Nv&#8209BdIzc 7fff  0     0     0     0     0     0     0         1           1        00
62371 4015 00 1               002f 80 00 00 ba Nv&#8209BdIzc 7fff  0     0     0     0     0     0     0         1           1        00
62371 002e 40 1               002e 80 00 00 ba Nv&#8209BdIzc 7fff  0     0     0     0     0     0     0         1           1        00
62370 002e 40 1               002e 80 00 00 ba Nv&#8209BdIzc 7fff  0     0     0     0     0     0     0         1           1        00
62370 002d 15 1               002d 80 00 00 ba Nv&#8209BdIzc 7ffc  0     0     0     0     0     0     0         1           1        00
62369 002d 15 1               002d 80 00 00 ba Nv&#8209BdIzc 7ffc  0     0     0     0     0     0     0         0           0        00
62369 002c ad 1  LDA Abs 002c 80 00 00 ba Nv&#8209BdIzc 7ffc  0     0     0     0     0     0     0         1           1        00
62368 002c ad 1  LDA Abs 002c 80 00 00 ba Nv&#8209BdIzc 7ffc  0     0     0     0     0     0     0         1           1        00
62368 4017 80 0               002c 80 00 00 ba Nv&#8209BdIzc 7ffe  0     0     0     0     0     0     0         1           1        00
62367 4017 40 0               002c 80 00 00 ba Nv&#8209BdIzc 7ffe  0     0     0     0     0     0     0         1           1        00
62367 002b 40 1               002b 80 00 00 ba Nv&#8209BdIzc 7ffe  0     0     0     0     0     0     0         1           1        00
62366 002b 40 1               002b 80 00 00 ba Nv&#8209BdIzc 7ffe  0     0     0     0     0     0     0         1           1        00
62366 002a 17 1               002a 80 00 00 ba Nv&#8209BdIzc 7fff  0     0     0     0     0     0     0         1           1        00
62365 002a 17 1               002a 80 00 00 ba Nv&#8209BdIzc 7fff  0     0     0     0     0     0     0         1           1        00
62365 0029 8d 1  STA Abs 0029 80 00 00 ba Nv&#8209BdIzc 7fff  0     0     0     0     0     0     0         1           1        00
62364 0029 8d 1  STA Abs 0029 80 00 00 ba Nv&#8209BdIzc 7fff  0     0     0     0     0     0     0         1           1        00
62364 0028 80 1               0028 00 00 00 ba nv&#8209BdIZc 7f80  0     0     0     0     0     0     0         1           1        00
62363 0028 80 1               0028 00 00 00 ba nv&#8209BdIZc 7f80  0     0     0     0     0     0     0         1           1        00
62363 0027 a9 1  LDA #   0027 00 00 00 ba nv&#8209BdIZc 7f80  0     0     0     0     0     0     0         1           1        00
62362 0027 a9 1  LDA #   0027 00 00 00 ba nv&#8209BdIZc 7f80  0     0     0     0     0     0     0         1           1        00
62362 4017 00 0               0027 00 00 00 ba nv&#8209BdIZc 7fc0  0     0     0     0     0     0     0         1           1        00
62361 4017 40 0               0027 00 00 00 ba nv&#8209BdIZc 7fc0  0     0     0     0     0     0     1         1           1        00
62361 0026 40 1               0026 00 00 00 ba nv&#8209BdIZc 7fc0  0     0     0     0     0     0     1         1           1        00
62360 0026 40 1               0026 00 00 00 ba nv&#8209BdIZc 7fc0  0     0     0     0     0     0     1         1           1        00
62360 0025 17 1               0025 00 00 00 ba nv&#8209BdIZc 7fe0  0     0     0     0     0     0     1         1           1        00
62359 0025 17 1               0025 00 00 00 ba nv&#8209BdIZc 7fe0  0     0     0     0     0     0     1         1           1        00
62359 0024 8d 1  STA Abs 0024 00 00 00 ba nv&#8209BdIZc 7fe0  0     0     0     0     0     0     1         1           1        00


Top
 Profile  
 
PostPosted: Sun Apr 27, 2014 4:08 am 
Offline

Joined: Thu Feb 28, 2013 11:14 am
Posts: 43
Hi again...
I've started to implement my algorithm for frame counter and noticed that my tests don't work the way I wanted them to. So I adjusted the timings, and «precise» now fail it again (but my program does not :P).
So if anyone can check this on real NES it would be great. I've attached new version of the tests below.


Attachments:
test_apu_2.tar.gz [7.41 KiB]
Downloaded 377 times
Top
 Profile  
 
PostPosted: Sun Apr 27, 2014 7:01 am 
Offline

Joined: Sun Sep 19, 2004 11:12 pm
Posts: 20770
Location: NE Indiana, USA (NTSC)
1 passed
2 passed and failed
3-5 passed
6 passed and failed
7-10 passed


Top
 Profile  
 
PostPosted: Sun Apr 27, 2014 7:22 am 
Offline

Joined: Thu Feb 28, 2013 11:14 am
Posts: 43
tepples, "passed and failed" you mean v1 passed, v2 failed, right?


Top
 Profile  
 
PostPosted: Sun Apr 27, 2014 8:19 am 
Offline

Joined: Sun Sep 19, 2004 11:12 pm
Posts: 20770
Location: NE Indiana, USA (NTSC)
I mean that on tests 2 and 6 of test_apu_2, pressing the Reset button on the Control Deck would randomly display "TEST PASSED" or "TEST FAILED". I suspect this has something to do with alignment between the CPU and the PPU. Each reset puts them in one of four relative alignments.


Top
 Profile  
 
PostPosted: Sun Apr 27, 2014 8:42 am 
Offline

Joined: Thu Feb 28, 2013 11:14 am
Posts: 43
Thats really strange behavior then. I haven't seen it in any emulator so far. Also PPU should not affect CPU/APU synchronization here. Proly I should just buy NES and torture every single thing of it.


Top
 Profile  
 
Display posts from previous:  Sort by  
Post new topic Reply to topic  [ 19 posts ]  Go to page 1, 2  Next

All times are UTC - 7 hours


Who is online

Users browsing this forum: No registered users and 4 guests


You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot post attachments in this forum

Search for:
Jump to:  
Powered by phpBB® Forum Software © phpBB Group