tepples wrote: ↑Wed Apr 14, 2021 10:53 am
When instruction PLP is executed:
Bit 7 is sent to the N flag
Bit 6 is sent to the V flag
The CPU disregards bit 5
The CPU disregards bit 4
Bit 3 is sent to the D flag (which the ADC and SBC instructions ignore but which can still be set to 1 or 0)
Bit 2 is sent to the I flag
Bit 1 is sent to the Z flag
Bit 0 is sent to the C flag
When comparing the results of your emulator to the results from Nintendulator, disregard bits 5 and 4 in the "P after this instruction" field in the comparison.
Thanks!
Can You explain me one more thing?
When CPU is powered-up then it's status is set to 0x34 so Bit 5 is set to 1 Bit 4 and Bit 3 also, remaining bits are 0's.
But when reset happens Bit 3 is set to 1 and remaining bits doesn't change or they are set to 0's?
Edit:
Actually i have one more question, if you can answer it will be great.
In nestest txt file, author writes that test results are stored in specific locations, but i dont understand what does he mean by saying, that all tests results are stored in 03h, and then listing addresses where 03h address is taken by BCC or SBC test result.
I hope You understand what i want to tell xd
Can You tell me where this results are stored?
https://github.com/christopherpow/nes-t ... estest.txt
Line 66, 95 and 371