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 Post subject:
PostPosted: Tue Sep 16, 2008 8:29 am 
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Hi I'm new and am writing my first NES emulator... still have some bugs in the CPU methinks, and haven't done much as far as video is concerned. I ran the test ROM and it got to the point where it was polling the PPU I think... problem I don't have any PPU code written yet. Is there a way you could make the CPU test ROM store results in specified places in memory instead?

Thanks for the ROM though... I've already found a few bugs trying to get it going.


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 Post subject:
PostPosted: Wed Dec 10, 2008 10:01 am 
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As for nestest 5, I'm sure it was not built with such keys, as it said in readme file. I tried:
Code:
ca65 -I common -o rom.o 01-implied.a
ld65 -C nes.cfg rom.o -o rom.nes
pause
, but got bunch of mistakes even in first included file (common.a). Also
Quote:
Don't bother trying to build a multi-test ROM

So what's then 'cpu.nes'?


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 Post subject:
PostPosted: Wed Dec 10, 2008 11:19 am 
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griever wrote:
As for nestest 5, I'm sure it was not built with such keys, as it said in readme file.

What "keys" are you referring to? I see no mention of that in this thread or the readme.
Quote:
I tried:
Code:
ca65 -I common -o rom.o 01-implied.a
ld65 -C nes.cfg rom.o -o rom.nes
pause
, but got bunch of mistakes even in first included file (common.a).

I'm sorry to hear that (hint, hint).
Quote:
Also
Quote:
Don't bother trying to build a multi-test ROM

So what's then 'cpu.nes'?

A multi-test ROM made of all the tests in source/. 'offical.nes' is the same, except the symbol OFFICIAL_ONLY is defined, which disables the unofficial instructions. The "multi" means it has a special shell that runs each individual test file's assembled output. Building such a multi-test wasn't simple enough to be worth releasing.


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 Post subject:
PostPosted: Thu Dec 11, 2008 11:50 am 
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Quote:
What "keys" are you referring to?

Sorry, looks like language issues lead us to misunderstanding, I've meant command line parameters.
Here is the report, but sure thing, it's not a source bug and I've got something wrong...
BTW, I tried to build only one test. How can I build two or more tests, which sould be commited one by one (just bat file text will do just fine...)


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 Post subject:
PostPosted: Sat Dec 27, 2008 7:42 pm 
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Joined: Tue Jun 17, 2008 11:51 am
Posts: 61
I am having some trouble with the ARR from the 6502-NMOS-extra.opcodes by Adam Vardy, ARR is supposed to do an AND the operand value then ROR A, and from http://nesdev.com/undocumented_opcodes.txt, it says ARR AND byte with accumulator, then rotate one bit right in accu-mulator then from bit 5 and 6 sets carry and overflow flag accordingly. Which one is right for the NES?


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 Post subject:
PostPosted: Sat Dec 27, 2008 9:46 pm 
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Here's what my NES seems to be doing for ARR flag calculation (the undocumented_opcodes.txt is correct for A, that is, A = (A & mask) >> 1):
Code:
// a = A, f = flags, imm = immediate byte. Returns new flags.
int arr( int a, int f, int imm )
{
    a = (a & imm) >> 1;
   
    if ( f & z02 )
        f &= ~z02;
    else if ( a == 0 )
        f |= z02;
   
    f &= ~(v40 | c01);
   
    switch ( a & 0x60 )
    {
    case 0x00:                 break;
    case 0x20: f |= v40;       break;
    case 0x40: f |= v40 | c01; break;
    case 0x60: f |=       c01; break;
    }
   
    return f;
}

The only difference from undocumented_opcodes.txt is the Z flag. If Z was already set before ARR executes, then Z is cleared regardless of A. If Z was clear before ARR, then it's set based on A after ARR finishes.


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 Post subject:
PostPosted: Mon Jan 12, 2009 11:53 am 
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hap wrote:
Quote:
Specifically, do problems show up during page boundary crossing, when there's no page crossing, or both? I suspect that since the store value is affected by the upper byte of the target address (the "fixed" version, with 1 added to it), it's possible that a page crossing would also cause an issue with the upper address lines during the store cycle.
You're right. Not that I've verified this on the NES, but blargg_nes_cpu_test5 passes on my emu if I mask the high address byte with $00 if there's a page crossing on SYA or SXA. Simply ignoring the write on page crossing made it pass too. Though, ORing it with $700 on page crossing (making it sometimes write to $700 like blargg said), makes it fail.


Could it be that the index gets shifted to the right when crossing a boundary on those instruction? That would explain the behavior although the test set is too limited to tell for sure.


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 Post subject:
PostPosted: Mon Jan 12, 2009 2:10 pm 
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Yeah, I make no claim to test the unofficial instructions thoroughly. I don't care about them enough to bother figuring out their full behavior (which could be very involved, no telling).


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 Post subject: Re: New CPU test ROM
PostPosted: Sun Jul 19, 2009 7:16 pm 
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It's not obvious to me how to tell what is failing when it says there are errors? I get no errors from nestest on either official or unofficial instructions.


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 Post subject: Re: New CPU test ROM
PostPosted: Mon Jul 20, 2009 6:46 am 
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blargg wrote:
Replaced with version that doesn't stop on failure, so you get a list of all the instructions that failed.


What does error 1 mean? I get error 1 ten times with a group of several opcodes listed each time. Also, is instruction timing tested by this ROM?


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 Post subject: Re: New CPU test ROM
PostPosted: Tue Jul 21, 2009 5:10 am 
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CaptainMuscles wrote:
What does error 1 mean? I get error 1 ten times with a group of several opcodes listed each time. Also, is instruction timing tested by this ROM?


Error 1 just gets printed whenever your emu fails a group opcodes, just ignore it, instead focus on what opcode that fails, the test tells you the opcode number that fails, it does not test instruction timing, although blargg has made another test that specifically tests timing, you can get it at his site.


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 Post subject: Re: New CPU test ROM
PostPosted: Tue Jul 21, 2009 6:50 am 
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qeed wrote:
Error 1 just gets printed whenever your emu fails a group opcodes, just ignore it, instead focus on what opcode that fails, the test tells you the opcode number that fails...


Thanks for the response. I am afraid I still do not understand how to interpret the results. The final part of the output displays:

Errors: 10
Failed

Does this mean that opcode $10, BPL, failed? I am confused because it also happens that it says I am failing each of the 10 groups, and I don't see any other indicator that could be interpreted as an opcode.

EDIT:
Is the list of opcodes displayed in each section showing those that failed? That would make the most sense, but that would also mean that most, if not all, of my opcodes are failing, which I'm hoping is not the case.


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 Post subject: Re: New CPU test ROM
PostPosted: Tue Jul 21, 2009 8:38 am 
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CaptainMuscles wrote:
qeed wrote:
Error 1 just gets printed whenever your emu fails a group opcodes, just ignore it, instead focus on what opcode that fails, the test tells you the opcode number that fails...


Thanks for the response. I am afraid I still do not understand how to interpret the results. The final part of the output displays:

Errors: 10
Failed

Does this mean that opcode $10, BPL, failed? I am confused because it also happens that it says I am failing each of the 10 groups, and I don't see any other indicator that could be interpreted as an opcode.

EDIT:
Is the list of opcodes displayed in each section showing those that failed? That would make the most sense, but that would also mean that most, if not all, of my opcodes are failing, which I'm hoping is not the case.


Yes thats the errors you should be looking at, the list of opcodes displayed in each section. Successful opcode is not printed.


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 Post subject: Re: New CPU test ROM
PostPosted: Tue Jul 21, 2009 6:09 pm 
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qeed wrote:
Yes thats the errors you should be looking at, the list of opcodes displayed in each section. Successful opcode is not printed.

That doesn't make any sense...there are so many opcodes printed that I couldn't possibly have a working emulator if that were the case.

Implied NOP is listed as failing...and about 20 other implied instructions (DEX, DEY, INX, INY)

I must be a complete idiot.

EDIT: I thought perhaps a failing opcode would have an asterisk next to it or something...but couldn't see anything like that in the output.

Perhaps we should let the test author explain it? I do not at all intend to suggest that his test is bunk...


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 Post subject: Re: New CPU test ROM
PostPosted: Tue Jul 21, 2009 8:40 pm 
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NESICIDE wrote:
qeed wrote:
Yes thats the errors you should be looking at, the list of opcodes displayed in each section. Successful opcode is not printed.

That doesn't make any sense...there are so many opcodes printed that I couldn't possibly have a working emulator if that were the case.

Implied NOP is listed as failing...and about 20 other implied instructions (DEX, DEY, INX, INY)

I must be a complete idiot.

EDIT: I thought perhaps a failing opcode would have an asterisk next to it or something...but couldn't see anything like that in the output.

Perhaps we should let the test author explain it? I do not at all intend to suggest that his test is bunk...


I understand what you mean. My emulator seemed to be working almost completely with a couple of games and it passed all nestest.nes tests, but listed massive failures in Blargg's CPU test. I assumed at first that it was listing each opcode tested.

I figured out what the problem with mine was though. I was not setting status flags 5 and 6 properly for NMI/BRK/PHP. Since the status register is included in all of the checksums, a single incorrect bit can through all of the tests off. Once I fixed those according to a thread I found searching these boards, nearly all of my tests passed and only a few opcodes were listed.


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