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PostPosted: Sun May 05, 2013 11:20 am 
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Joined: Sun Sep 19, 2004 11:12 pm
Posts: 19238
Location: NE Indiana, USA (NTSC)
Following someone else's diagram of frame timing, I'm working on a diagram too. This one gives an overview of the pixel data path in the PPU.

View diagram (SVG, 848x208 pixels)


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PostPosted: Sun May 05, 2013 10:29 pm 
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Joined: Fri Mar 08, 2013 9:55 pm
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Location: Linköping, Sweden
Maybe "Background and sprite enables" could be split up into two boxes, and drawn as selectors that select either 0 (if bg/sprites disabled) or the output from the preceding stage (if enabled). Kinda awkward in hand-coded SVG though perhaps.

Some indication that the nametable position counter is v (loopy_v) might be nice too.


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PostPosted: Tue May 07, 2013 6:16 am 
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Nice diagram!

I suggest adding a start and end symbol to make it easier to see where to start. Also, use different shapes to differentiate between data and process.


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PostPosted: Thu May 09, 2013 8:33 am 
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Location: NE Indiana, USA (NTSC)
Updated. Secondary OAM is an input (parallelogram), as are PPUMASK entries, many of which now feed an AND gate. Fine scroll is an input feeding a multiplexer.

To do:
  • Break up BG enable and BG clip with logic to generate them from H sequencer


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PostPosted: Tue Jun 18, 2013 6:16 pm 
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Location: NE Indiana, USA (NTSC)
Update:
  • Added construction of nametable position counter enable from BG and sprite enable
  • Added clipping of left 8 pixels


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