Nobody ever had problems with the NES cpu?

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TmEE
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Re: Nobody ever had problems with the NES cpu?

Post by TmEE » Tue Nov 26, 2013 10:33 pm

There's only 18 of them though, byte or word wide depending if you access VRAM or CRAM and VSRAM.
HBL is fully dedicated to sprites processing for the coming line, and active line is spent on fetching BG tiles, tilemap entries and VSCROLL values and refresh slots + free access slots (refresh steals every 4th access slot).
But yes, it is kinda same deal as with TG16/PCE where you have full access to VRAM all times, but because there's only one BG layer. That machine also uses PSARM as VRAM. This machine should have had DMA unit to move data, the CPU cannot saturate the bandwidth in any case, and the chip can do way more that games show, much like Master System where CPU can only use up 20% of available bandwidth.

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Re: Nobody ever had problems with the NES cpu?

Post by tepples » Tue Nov 26, 2013 10:51 pm

TmEE wrote:But yes, it is kinda same deal as with TG16/PCE where you have full access to VRAM all times, but because there's only one BG layer. That machine also uses PSARM as VRAM. This machine should have had DMA unit to move data, the CPU cannot saturate the bandwidth in any case
So that's why the TG16 lost to the Genesis in Latin language markets: no Blast Processing.

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qbradq
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Re: Nobody ever had problems with the NES cpu?

Post by qbradq » Wed Nov 27, 2013 9:30 am

I thought it was because Bonk sucks? Or did Sonic just have too much rockin' cool 90's attitude? :D

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Re: Nobody ever had problems with the NES cpu?

Post by psycopathicteen » Thu Nov 28, 2013 5:36 pm

I can confirm that BG3 is the reason why the SNES doesn't have access cycles or an OAM located in VRAM. It takes 3 pixels to fetch BG1, 3 pixels to fetch BG2, and 2 pixels to fetch BG3, (hence why BG3 is only 2bpp), which adds up to 8 pixels.

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Re: Nobody ever had problems with the NES cpu?

Post by TmEE » Thu Nov 28, 2013 6:35 pm

Has anyone actually tried to measucre what is happening on the VRAM bus in SNES ?

Hooking some data lines to RGB signal can produce some pretty good insight :
http://www.tmeeco.eu/BitShit/MoreSpriteFun.jpg

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Re: Nobody ever had problems with the NES cpu?

Post by strat » Thu Nov 28, 2013 9:36 pm

Maybe Keith Courage in Alpha Zones wasn't as captivating a pack-in title as Altered Beast.

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Re: Nobody ever had problems with the NES cpu?

Post by psycopathicteen » Fri Nov 29, 2013 10:42 am

http://wiki.superfamicom.org/snes/show/Timing

Whoever wrote this document might have done so. The way it is being described sounds extremely similar to the VDP timing sheet on spritesminds, except the sPPU data bus is half the size, but twice the speed, and fetches one tile at a time, instead of two tiles at once.

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Re: Nobody ever had problems with the NES cpu?

Post by psycopathicteen » Tue Dec 24, 2013 11:54 am

I know that the 65816 requires fast memory because it has a multiplexed data/address bus, but since the SNES uses a custom Ricoh chip, couldn't they have gotten the bus multiplexer removed, and had allowed the chip to run at 5.37 or 7.16 Mhz instead? Because the DMA is built into the Ricoh chip, couldn't they have ran DMA at 5.37 or 7.16 Mhz too?

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Re: Nobody ever had problems with the NES cpu?

Post by tepples » Tue Dec 24, 2013 12:10 pm

Multiplexing has little to do with it. Even the non-multiplexed 6502 needs a half cycle to generate each address. A 6502 family CPU divides the CPU cycle into low and high halves. An address is ready by the start of the high half, and the data has to be ready by the end.

If it helps, think of each 65816 cycle as two cycles, address generation and memory access, because other CPUs like Z80 and 68000 that allow a whole cycle for memory access tend to be clocked faster to compensate for their lower IPC. If you put a divide by 2 in front of a 65816's clock input, that'd correspond to an "internal operation" cycle after each memory access. And just as the Amiga used the 68000's copious "internal operation" cycles for video, the Apple II used "internal operation" half-cycles for video.

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Re: Nobody ever had problems with the NES cpu?

Post by psycopathicteen » Tue Dec 24, 2013 2:09 pm

I'm surprised how many bottlenecks there were with designing consoles back then. Requiring 2x fast memory was mostly an issue with CPUs, right? PPUs and support chips didn't need RAM that was 2x as fast as the access speed?

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Re: Nobody ever had problems with the NES cpu?

Post by lidnariq » Tue Dec 24, 2013 3:05 pm

It's a lot easier to use slower memory for video memory, because the fetch order is not only almost entirely predictable but almost entirely in-order. So any high-latency high-bandwidth technique works here, such as increasing the bus width.

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Re: Nobody ever had problems with the NES cpu?

Post by tepples » Tue Dec 24, 2013 5:02 pm

Except of course where there's indirection involved, such as tile fetches whose address depends on a nametable fetch.

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Re: Nobody ever had problems with the NES cpu?

Post by LocalH » Wed Dec 25, 2013 12:17 am

tepples wrote:And just as the Amiga used the 68000's copious "internal operation" cycles for video, the Apple II used "internal operation" half-cycles for video.
C64 is the same. The VIC-II is able to fetch most, but not all, of its data during those same half-cycles. Outside of that, on one of every eight scanlines, the VIC-II steals 40 cycles from the 6510 to read character pointers (analogous to nametable data) and two cycles for each sprite that's active.

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Re: Nobody ever had problems with the NES cpu?

Post by psycopathicteen » Wed Dec 25, 2013 2:07 pm

What if the SNES kept the CPU at 2.68 and 3.58Mhz, but sped up the DMA to 5.37Mhz. Would that have worked?

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Re: Nobody ever had problems with the NES cpu?

Post by tepples » Wed Dec 25, 2013 2:23 pm

I always thought of DMA as read on one half-cycle, write on the other. You can't be sure that the data coming out of the source is correct until the end of the read half-cycle, and the value needs to be held on the data bus during the write half-cycle.

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