Espozo wrote:
Now, according to this:
https://en.wikipedia.org/wiki/Floating-point_unit, it seems just like computer hardware that does math. The thing is, it seems that this is already integrated in just about every single processor ever
The difference between the math done in an FPU and the math done in the CPU is that in an FPU, the "exponents" determine how much shifting is done to the numbers when they are added or subtracted. This means you can represent numbers in the quintillions and numbers in the one-quintillionths with the same data type.
Prior to the i486DX and MC68040, the FPU was a separate coprocessor, model number 8087, 80287, 80387, 68881, or 68882.
Espozo wrote:
I know it's a common misconception that we aren't using 32 or 64 bit processors and that we're using 128 + bit processors
Misconception my rectum. SSE instructions, introduced with the Pentium III, work on 128-bit vectors. So do the AltiVec instructions in the PowerPC G4. AVX instructions, introduced with the Intel Core Sandy Bridge and AMD Bulldozer processors, work on 256-bit vectors.
Atari defines the "bits" of a platform as the width of the
data bus to RAM or VRAM. By this definition, the NES and SMS are 8-bit, the TG16 and Super NES are 16-bit because the VDC/S-PPU data bus is 16-bit, the Genesis is 16-bit because the CPU data bus is 16-bit, and the Jaguar is 64-bit because the GPU data bus is 64-bit. The GBA is 16-bit, the 8088 is 8-bit, the 286 and 386SX are 16-bit, the 386DX and 486 are 32-bit, and everything from the Pentium through the first Athlon 64 are 64-bit. But bus width can be deceiving, as Rambus RDRAM and AMD HyperTransport use narrower buses at double or higher data rate. The N64 is 8-bit by this measure.