rainwarrior wrote:
...but also now that I know about this I can suddenly see that for the mirroring table, the nametable registers ALWAYS apply. (Except for mode 0 where it subsitutes PPU 10/11?)
As far as I can tell, there are the following "well defined" modes:
$20 - standard 8x1 banking, only intended to work with 2 KiB of NTRAM, but the upper address lines still do something funny during nametable fetches
$21 - standard 4x2 banking, arbitrary nametable layouts with access to two up-to-256 K memories
$22 - N108 style banking, for picking arbitrary source nametables but only in 1/H/V configurations
$23 - N108 style banking, for generating 4 nametables
$01 - 4x2 banking, 512K CHR, arbitrary nametable layouts, but only half of each CHR bank available for ROM nametables.
The other three – $00, $02, and $03 – are artifacts of how the logic works, and what I was trying to express with the weird tables.
In practice, you could probably say "there are 32 ways to configure [$B003] & $1F, but nametable behavior falls out into the following 11 behaviors:
00 06 07 08 0E 0F 26 2E - all have horizontal mirroring with R6/R7 controlling the specific source nametables
01 05 09 0D 21 25 29 2D - all have arbitrary mirroring with R4-R7 controlling
02 03 04 0A 0B 0C 22 2A - all have vertical mirroring with R6/R7 controlling the specific source nametables
ROM nametables hard to use and 8x1 banking:
20 - vertical mirroring (or horizontal spread of ROM nametables, but R6/R7 is used to both specify a nametable and pattern table bank, so hard to use)
24 - horizontal mirroring (or vertical spread, &c)
28 - 1scA
2C - 1scB
ROM nametables easy to use and N108 CHR banking:
23 - horizontal mirroring, or vertical spread of 4 ROM nametables
27 - vertical mirroring, or horizontal spread of 4 ROM nametables
2B - 1scB - I don't know why you'd bother
2F - 1scA - I don't know why you'd bother "
Quote:
This is what I was most confused about, I thought the A10 signal was passing PPU A10 through when in CIRAM mode, but it's really just being forced by that even odd logic?
Right. PPU A10 is only what's used on pattern table addresses.