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PostPosted: Sat Oct 21, 2017 2:28 pm 
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Posts: 38
krzysiobal wrote:
1) IC25.12 == IC28.11 --- No
2) IC25.13 == R3.2 --- Assuming R3 is the one on the back? No. The traces under IC25 are super confusing. But I found it was (at least) going to CART1.32. IC25.4 also goes to CART1.32.
3) IC25.11 == IC1.13 --- No, IC25.13 to IC1.13
4) IC25.11 == IC1.1 --- No, IC1.1 connected to 25.13
5) IC25.11 == IC2.10 --- No, 25.11 to IC1.2
6) IC1.6 == IC15.5 --- Yes
7) IC1.6 == IC28.9 --- Yes
8) IC6.9 == IC4.9 --- Yes
9) IC1.9 == IC6.10 --- Yes
10) IC5.10 - does connect to any of IC25 pins? --- IC25.12
11) IC1.12 - any other pins it connect to? I see a trace connected under the chip but I can't manage to find where it's going. Checked a lot of possibilities and nothing…
12) IC1.2 - any other pins it connect to? --- Yes. Connected to tiny vertical trace on the back (between IC1 and IC5, under the IC then gets lost under IC28.


Added a note to 5)
Fixed error in 4)

While checking your wiring of the back, why did you connect IC3.5? the trace is cut.


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PostPosted: Sat Oct 21, 2017 3:12 pm 
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Joined: Sun Jun 12, 2011 12:06 pm
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Location: Poland
Thank you so much!! Now everything is clear. Could you just check that?
ic2.10 == ic25.13
ic1.2 == ic25.11
ic1.12 == r3.2

MLX wrote:
krzysiobal wrote:
While checking your wiring of the back, why did you connect IC3.5? the trace is cut.

Yes, I marked this on schematics as `trace is cut`, thank you for notifing.


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PostPosted: Sat Oct 21, 2017 3:19 pm 
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a) yes
b) yes
c) no


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PostPosted: Sat Oct 21, 2017 4:10 pm 
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Joined: Sun Jun 12, 2011 12:06 pm
Posts: 245
Location: Poland
This is fixed schematics according to MLX suggestion:
Image

Assuming that SMB3 ROM was not modified at all, it should still work - after scanline counter is reset (*), it waits 13 scanlines (13*114 M2 cycles) and then every 114 M2 cycles, scanline counter is clocked.

(*) IC1A resets it when there are at least 8 CPU cycles outside $8000-$ffff (happens only when using OAM_DMA write or executing code from RAM?), so should automatically reset it one time per frame (in VBLANK)

Why 13 scanlines delay? SMB3 NTSC version resets scanline counter in VBLANK at scanline 248, 13 scanlines ahead before rendering next frame starts.

It is really awesome how those bootleggers at their time (this cart is dated for 89-09) have big knowledge and understanding of the NES hardware. Today, when there are really many NES freaks and access to common knowledge is not limited, still not everything is known.


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PostPosted: Sun Oct 22, 2017 1:58 pm 
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I'll try to find where goes IC1.12 when I have some time. Maybe the trace is cut under the chip?
Also I hope I can bring back my PC back from work so I can dump the cartridge. but I don't know when I can do that.


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PostPosted: Sun Oct 22, 2017 2:28 pm 
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Joined: Sun Jun 12, 2011 12:06 pm
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Location: Poland
I thought it will be ic1.12 == r3.2 because r3.2 is the only trace that it's not connected to anything but goes there.

Yes, it might me cut out totally and ic1.12 not connected to anything (so it will behave like would be connected to +5V).

That would be even most rational answer because it is responsible for second way of acknowledging interrupt and original MMC3 has only one way.


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PostPosted: Mon Oct 23, 2017 11:56 am 
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Alright so checked again and there's continuity from IC1.12 on the upper leg of C3.


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