supercat wrote:The signal on /LOAD needs to become valid after the signal on CLK, so I think you have the roles of /PPUWR and PPUA13 reversed.
Yes, you are right. PPU A13 and PPU /WR should be swapped on my schematic.
supercat wrote:I think I'd favor triggering on addresses in the range $3000-$3FFF. If you're only using this thing for multi-cart selection, you could exploit the fact that (if I'm remembering right) the part has two active-high carry count-enable inputs so that writes to 0x3xxx would advance the count and nothing else would do anything (if I recall, CPU writes to palette memory are stifled so they don't hit the bus).
PPU memory $3000~$3EFF is the mirror of $2000~$2EFF, which is usually the nametable of the screen. So placing the register here will be conflicting with nametables.
supercat wrote:Have the multi-cart copy a small piece of code into the NES internal RAM, load X with a value 1-15, and then jump to the internal RAM code:
Code:
lda #$30 ; Not $3F, which would be palette
sta $2006
sta $2006
@lp:
sta $2007
dex
bne @lp
jmp ($FFFC)
The first eight bytes could be in the cart-select ROM if desired (run before jumping to RAM) but are shown here for simplicity.
Yes, I placed the whole function in RAM.
lidnariq wrote:It turns out a number of games assume they can write to CHR ROM and have the write be ignored...
Luckily I'm making a VRC6 multi-cart. Neither of the three games (Mouryou Senki MADARA, Esper Dreams 2, Akumajo Densetsu) writes to CHR ROM.
(Off-topic) There is a bug found on the
VRC6 pinout page when I'm trying to wire the circuit. Pin 19 of VRC6 is PPU A13 rather than PPU /A13 appearently. Neither of the three games connects PPU /A13 of edge connector to Pin 19 of VRC6.
lidnariq wrote:hence why the pirate multicarts sometimes added a "write-protect" bit in their configuration register.
Actually I've also read
this document; scroll down to "4. Protect registers from accidental writing" and finally built this circuit:
Code: Select all
GND
| |
R C
Diode | | -------\/-------
M2 ---|>|--+-+--------------------|/CLEAR VCC|- VCC
PPU /WR -------|>|---+------------|CLK CO|-
PPU D0 --------------|------------|D0 Q0|-------- PRG & CHR A18
PPU D1 --------------|------------|D1 Q1|-------- PRG & CHR A19
| -|D2 74'161 Q2|-
PPU D3 --------------|------------|D3 Q3|---------------.
| GND ---|CNT CI|--- GND |
| GND ---|GND /LOAD|--- PPU A13 |
| ---------------- |
+----|<|------------------------------------+
|
R
|
GND
I'm using two AM29F080, each game (plus the bootloader ROM itself) takes 256K + 256K so it is perfectly to switch games using only A18 & A19. Here I'm using two diodes and a pull-down resistor as a poor-man's OR gate. When switching games, I write (gameIndex | (1 << 3)) to PPU $0000. Here PPU D3 acts as the "LOCK bit".
BUT IT DIDN'T WORK! I watched the Q0~Q3 of 74'161 using LEDs to show the status and noticed that:
1. Data latched successfully.
2. Once switched to the selected game, data on Q0~Q3 disappeard immediately(all 0). Then the game crashed.
Removed the OR gate and tried again:
1. Data latched successfully.
2. Once switched to the selected game, data on Q0~Q3 disappeard immediately(all 0). Bootloader ran again.
I don't understand why this happened.